* [PATCH V2 0/2] Fix WKUP domain IO PADCONFIG size issue and RPi header support
@ 2023-01-24 12:03 Sinthu Raja
2023-01-24 12:03 ` [PATCH V2 1/2] arm64: dts: ti: k3-j721s2-mcu-wakeup: Fix IO PADCONFIG size for wakeup domain Sinthu Raja
2023-01-24 12:03 ` [PATCH V2 2/2] arm64: dts: ti: k3-am68-sk-base-board: Add pinmux for RPi Header Sinthu Raja
0 siblings, 2 replies; 4+ messages in thread
From: Sinthu Raja @ 2023-01-24 12:03 UTC (permalink / raw)
To: Nishanth Menon, Tero Kristo, Rob Herring
Cc: Vignesh Raghavendra, Krzysztof Kozlowski, linux-arm-kernel,
devicetree, linux-kernel, Sinthu Raja
From: Sinthu Raja <sinthu.raja@ti.com>
Hi All,
This patch series fix the incorrect IO PADCONFIG offset size of the
wakeup domain for J721S2 SoC and add RPi expansion header support for
AM68 SK.
Changes in V2:
- Update commit description.
- Update the offset value to 0x194 as 0x190 is the last register of the
IO PADCONFIG register set.
V1: https://lore.kernel.org/all/20230123135831.4184-1-sinthu.raja@ti.com/
Sinthu Raja (2):
arm64: dts: ti: k3-j721s2-mcu-wakeup: Fix IO PADCONFIG size for wakeup
domain
arm64: dts: ti: k3-am68-sk-base-board: Add pinmux for RPi Header
.../boot/dts/ti/k3-am68-sk-base-board.dts | 70 ++++++++++++++++++-
.../boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 2 +-
2 files changed, 70 insertions(+), 2 deletions(-)
--
2.36.1
^ permalink raw reply [flat|nested] 4+ messages in thread* [PATCH V2 1/2] arm64: dts: ti: k3-j721s2-mcu-wakeup: Fix IO PADCONFIG size for wakeup domain 2023-01-24 12:03 [PATCH V2 0/2] Fix WKUP domain IO PADCONFIG size issue and RPi header support Sinthu Raja @ 2023-01-24 12:03 ` Sinthu Raja 2023-01-24 12:03 ` [PATCH V2 2/2] arm64: dts: ti: k3-am68-sk-base-board: Add pinmux for RPi Header Sinthu Raja 1 sibling, 0 replies; 4+ messages in thread From: Sinthu Raja @ 2023-01-24 12:03 UTC (permalink / raw) To: Nishanth Menon, Tero Kristo, Rob Herring Cc: Vignesh Raghavendra, Krzysztof Kozlowski, linux-arm-kernel, devicetree, linux-kernel, Sinthu Raja From: Sinthu Raja <sinthu.raja@ti.com> The size of wkup domain I/O PADCONFIG register set is incorrect for J721S2. Therefore, update the PADCONFIG total offset size to the correct value for J721S2 SoC. Signed-off-by: Sinthu Raja <sinthu.raja@ti.com> --- Changes in V2: - Update commit description. - Update the offset value to 0x194 as 0x190 is the last register of the IO PADCONFIG register set. arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi index 0af242aa9816..b10f1e8b98e6 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi @@ -50,7 +50,7 @@ mcu_ram: sram@41c00000 { wkup_pmx0: pinctrl@4301c000 { compatible = "pinctrl-single"; /* Proxy 0 addressing */ - reg = <0x00 0x4301c000 0x00 0x178>; + reg = <0x00 0x4301c000 0x00 0x194>; #pinctrl-cells = <1>; pinctrl-single,register-width = <32>; pinctrl-single,function-mask = <0xffffffff>; -- 2.36.1 ^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH V2 2/2] arm64: dts: ti: k3-am68-sk-base-board: Add pinmux for RPi Header 2023-01-24 12:03 [PATCH V2 0/2] Fix WKUP domain IO PADCONFIG size issue and RPi header support Sinthu Raja 2023-01-24 12:03 ` [PATCH V2 1/2] arm64: dts: ti: k3-j721s2-mcu-wakeup: Fix IO PADCONFIG size for wakeup domain Sinthu Raja @ 2023-01-24 12:03 ` Sinthu Raja 2023-01-25 20:04 ` Rahul T R 1 sibling, 1 reply; 4+ messages in thread From: Sinthu Raja @ 2023-01-24 12:03 UTC (permalink / raw) To: Nishanth Menon, Tero Kristo, Rob Herring Cc: Vignesh Raghavendra, Krzysztof Kozlowski, linux-arm-kernel, devicetree, linux-kernel, Sinthu Raja From: Sinthu Raja <sinthu.raja@ti.com> Add pinmux required to bring out the i2c and gpios on 40-pin RPi expansion header on the AM68 SK board. Signed-off-by: Sinthu Raja <sinthu.raja@ti.com> --- No Changes in V2. .../boot/dts/ti/k3-am68-sk-base-board.dts | 70 ++++++++++++++++++- 1 file changed, 69 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts index 2091cd2431fb..722cd19b74e0 100644 --- a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts +++ b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts @@ -173,6 +173,32 @@ J721S2_IOPAD(0x0a0, PIN_INPUT, 0) /* (AB25) MCASP0_AXR12.MCAN7_RX */ J721S2_IOPAD(0x09c, PIN_INPUT, 0) /* (T24) MCASP0_AXR11.MCAN7_TX */ >; }; + + main_i2c4_pins_default: main-i2c4-pins-default { + pinctrl-single,pins = < + J721S2_IOPAD(0x010, PIN_INPUT_PULLUP, 7) /* (AF28) MCAN13_RX.I2C4_SDA */ + J721S2_IOPAD(0x014, PIN_INPUT_PULLUP, 7) /* (AD25) MCAN14_TX.I2C4_SCL */ + >; + }; + + rpi_header_gpio0_pins_default: rpi-header-gpio0-pins-default { + pinctrl-single,pins = < + J721S2_IOPAD(0x0a8, PIN_INPUT, 7) /* (U24) MCASP0_AXR14.GPIO0_42 */ + J721S2_IOPAD(0x090, PIN_INPUT, 7) /* (W24) MCASP0_AXR8.GPIO0_36 */ + J721S2_IOPAD(0x0bc, PIN_INPUT, 7) /* (V28) MCASP1_AFSX.GPIO0_47 */ + J721S2_IOPAD(0x06c, PIN_INPUT, 7) /* (V26) MCAN1_TX.GPIO0_27 */ + J721S2_IOPAD(0x004, PIN_INPUT, 7) /* (W25) MCAN12_TX.GPIO0_1 */ + J721S2_IOPAD(0x008, PIN_INPUT, 7) /* (AC24) MCAN12_RX.GPIO0_2 */ + J721S2_IOPAD(0x0b8, PIN_INPUT, 7) /* (AA24) MCASP1_ACLKX.GPIO0_46 */ + J721S2_IOPAD(0x00c, PIN_INPUT, 7) /* (AE28) MCAN13_TX.GPIO0_3 */ + J721S2_IOPAD(0x034, PIN_INPUT, 7) /* (AD24) PMIC_WAKE0.GPIO0_13 */ + J721S2_IOPAD(0x0a4, PIN_INPUT, 7) /* (T23) MCASP0_AXR13.GPIO0_41 */ + J721S2_IOPAD(0x0c0, PIN_INPUT, 7) /* (T28) MCASP1_AXR0.GPIO0_48 */ + J721S2_IOPAD(0x0b4, PIN_INPUT, 7) /* (U25) MCASP1_AXR4.GPIO0_45 */ + J721S2_IOPAD(0x0cc, PIN_INPUT, 7) /* (AE27) SPI0_CS0.GPIO0_51 */ + J721S2_IOPAD(0x08c, PIN_INPUT, 7) /* (T25) MCASP0_AXR7.GPIO0_35 */ + >; + }; }; &wkup_pmx0 { @@ -214,12 +240,39 @@ J721S2_WKUP_IOPAD(0x0d0, PIN_OUTPUT, 0) /* (C23) WKUP_GPIO0_4.MCU_MCAN1_TX*/ >; }; + mcu_i2c0_pins_default: mcu-i2c0-pins-default { + pinctrl-single,pins = < + J721S2_WKUP_IOPAD(0x100, PIN_INPUT, 0) /*(H24) WKUP_GPIO0_63.MCU_I2C0_SCL*/ + J721S2_WKUP_IOPAD(0x104, PIN_INPUT, 0) /*(H27) WKUP_GPIO0_64.MCU_I2C0_SDA*/ + >; + }; + mcu_i2c1_pins_default: mcu-i2c1-pins-default { pinctrl-single,pins = < J721S2_WKUP_IOPAD(0x0e0, PIN_INPUT, 0) /* (F24) WKUP_GPIO0_8.MCU_I2C1_SCL */ J721S2_WKUP_IOPAD(0x0e4, PIN_INPUT, 0) /* (H26) WKUP_GPIO0_9.MCU_I2C1_SDA */ >; }; + + mcu_rpi_header_gpio0_pins_default: mcu-rpi-header-gpio0-pins-default { + pinctrl-single,pins = < + J721S2_WKUP_IOPAD(0x180, PIN_INPUT, 7) /* (G25) WKUP_GPIO0_66 */ + J721S2_WKUP_IOPAD(0x190, PIN_INPUT, 7) /* (K26) WKUP_GPIO0_49 */ + J721S2_WKUP_IOPAD(0x0c4, PIN_INPUT, 7) /* (E24) MCU_SPI1_D0.WKUP_GPIO0_1 */ + J721S2_WKUP_IOPAD(0x0c8, PIN_INPUT, 7) /* (C28) MCU_SPI1_D1.WKUP_GPIO0_2 */ + J721S2_WKUP_IOPAD(0x0c0, PIN_INPUT, 7) /* (D26) MCU_SPI1_CLK.WKUP_GPIO0_0 */ + J721S2_WKUP_IOPAD(0x0fc, PIN_INPUT, 7) /* (D25) MCU_SPI1_CS2.WKUP_GPIO0_15*/ + J721S2_WKUP_IOPAD(0x120, PIN_INPUT, 7) /* (G27) WKUP_GPIO0_56 */ + J721S2_WKUP_IOPAD(0x17c, PIN_INPUT, 7) /* (J26) WKUP_GPIO0_57 */ + J721S2_WKUP_IOPAD(0x184, PIN_INPUT, 7) /* (J27) WKUP_GPIO0_67 */ + J721S2_WKUP_IOPAD(0x0cc, PIN_INPUT, 7) /* (C27) MCU_SPI1_CS0.WKUP_GPIO0_3 */ + >; + }; +}; + +&main_gpio0 { + pinctrl-names = "default"; + pinctrl-0 = <&rpi_header_gpio0_pins_default>; }; &main_gpio2 { @@ -235,7 +288,8 @@ &main_gpio6 { }; &wkup_gpio0 { - status = "disabled"; + pinctrl-names = "default"; + pinctrl-0 = <&mcu_rpi_header_gpio0_pins_default>; }; &wkup_gpio1 { @@ -273,6 +327,20 @@ exp1: gpio@21 { }; }; +&main_i2c4 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&main_i2c4_pins_default>; + clock-frequency = <400000>; +}; + +&mcu_i2c0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&mcu_i2c0_pins_default>; + clock-frequency = <400000>; +}; + &main_sdhci0 { /* Unused */ status = "disabled"; -- 2.36.1 ^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH V2 2/2] arm64: dts: ti: k3-am68-sk-base-board: Add pinmux for RPi Header 2023-01-24 12:03 ` [PATCH V2 2/2] arm64: dts: ti: k3-am68-sk-base-board: Add pinmux for RPi Header Sinthu Raja @ 2023-01-25 20:04 ` Rahul T R 0 siblings, 0 replies; 4+ messages in thread From: Rahul T R @ 2023-01-25 20:04 UTC (permalink / raw) To: Sinthu Raja Cc: Nishanth Menon, Tero Kristo, Rob Herring, Vignesh Raghavendra, Krzysztof Kozlowski, linux-arm-kernel, devicetree, linux-kernel, Sinthu Raja On 17:33-20230124, Sinthu Raja wrote: > From: Sinthu Raja <sinthu.raja@ti.com> > > Add pinmux required to bring out the i2c and gpios on 40-pin RPi > expansion header on the AM68 SK board. > > Signed-off-by: Sinthu Raja <sinthu.raja@ti.com> > --- > > No Changes in V2. > > .../boot/dts/ti/k3-am68-sk-base-board.dts | 70 ++++++++++++++++++- > 1 file changed, 69 insertions(+), 1 deletion(-) > Tested-by: Rahul T R <r-ravikumar@ti.com> > diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts > index 2091cd2431fb..722cd19b74e0 100644 > --- a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts > +++ b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts > @@ -173,6 +173,32 @@ J721S2_IOPAD(0x0a0, PIN_INPUT, 0) /* (AB25) MCASP0_AXR12.MCAN7_RX */ > J721S2_IOPAD(0x09c, PIN_INPUT, 0) /* (T24) MCASP0_AXR11.MCAN7_TX */ > >; > }; > + > + main_i2c4_pins_default: main-i2c4-pins-default { > + pinctrl-single,pins = < > + J721S2_IOPAD(0x010, PIN_INPUT_PULLUP, 7) /* (AF28) MCAN13_RX.I2C4_SDA */ > + J721S2_IOPAD(0x014, PIN_INPUT_PULLUP, 7) /* (AD25) MCAN14_TX.I2C4_SCL */ > + >; > + }; > + > + rpi_header_gpio0_pins_default: rpi-header-gpio0-pins-default { > + pinctrl-single,pins = < > + J721S2_IOPAD(0x0a8, PIN_INPUT, 7) /* (U24) MCASP0_AXR14.GPIO0_42 */ > + J721S2_IOPAD(0x090, PIN_INPUT, 7) /* (W24) MCASP0_AXR8.GPIO0_36 */ > + J721S2_IOPAD(0x0bc, PIN_INPUT, 7) /* (V28) MCASP1_AFSX.GPIO0_47 */ > + J721S2_IOPAD(0x06c, PIN_INPUT, 7) /* (V26) MCAN1_TX.GPIO0_27 */ > + J721S2_IOPAD(0x004, PIN_INPUT, 7) /* (W25) MCAN12_TX.GPIO0_1 */ > + J721S2_IOPAD(0x008, PIN_INPUT, 7) /* (AC24) MCAN12_RX.GPIO0_2 */ > + J721S2_IOPAD(0x0b8, PIN_INPUT, 7) /* (AA24) MCASP1_ACLKX.GPIO0_46 */ > + J721S2_IOPAD(0x00c, PIN_INPUT, 7) /* (AE28) MCAN13_TX.GPIO0_3 */ > + J721S2_IOPAD(0x034, PIN_INPUT, 7) /* (AD24) PMIC_WAKE0.GPIO0_13 */ > + J721S2_IOPAD(0x0a4, PIN_INPUT, 7) /* (T23) MCASP0_AXR13.GPIO0_41 */ > + J721S2_IOPAD(0x0c0, PIN_INPUT, 7) /* (T28) MCASP1_AXR0.GPIO0_48 */ > + J721S2_IOPAD(0x0b4, PIN_INPUT, 7) /* (U25) MCASP1_AXR4.GPIO0_45 */ > + J721S2_IOPAD(0x0cc, PIN_INPUT, 7) /* (AE27) SPI0_CS0.GPIO0_51 */ > + J721S2_IOPAD(0x08c, PIN_INPUT, 7) /* (T25) MCASP0_AXR7.GPIO0_35 */ > + >; > + }; > }; > > &wkup_pmx0 { > @@ -214,12 +240,39 @@ J721S2_WKUP_IOPAD(0x0d0, PIN_OUTPUT, 0) /* (C23) WKUP_GPIO0_4.MCU_MCAN1_TX*/ > >; > }; > > + mcu_i2c0_pins_default: mcu-i2c0-pins-default { > + pinctrl-single,pins = < > + J721S2_WKUP_IOPAD(0x100, PIN_INPUT, 0) /*(H24) WKUP_GPIO0_63.MCU_I2C0_SCL*/ > + J721S2_WKUP_IOPAD(0x104, PIN_INPUT, 0) /*(H27) WKUP_GPIO0_64.MCU_I2C0_SDA*/ > + >; > + }; > + > mcu_i2c1_pins_default: mcu-i2c1-pins-default { > pinctrl-single,pins = < > J721S2_WKUP_IOPAD(0x0e0, PIN_INPUT, 0) /* (F24) WKUP_GPIO0_8.MCU_I2C1_SCL */ > J721S2_WKUP_IOPAD(0x0e4, PIN_INPUT, 0) /* (H26) WKUP_GPIO0_9.MCU_I2C1_SDA */ > >; > }; > + > + mcu_rpi_header_gpio0_pins_default: mcu-rpi-header-gpio0-pins-default { > + pinctrl-single,pins = < > + J721S2_WKUP_IOPAD(0x180, PIN_INPUT, 7) /* (G25) WKUP_GPIO0_66 */ > + J721S2_WKUP_IOPAD(0x190, PIN_INPUT, 7) /* (K26) WKUP_GPIO0_49 */ > + J721S2_WKUP_IOPAD(0x0c4, PIN_INPUT, 7) /* (E24) MCU_SPI1_D0.WKUP_GPIO0_1 */ > + J721S2_WKUP_IOPAD(0x0c8, PIN_INPUT, 7) /* (C28) MCU_SPI1_D1.WKUP_GPIO0_2 */ > + J721S2_WKUP_IOPAD(0x0c0, PIN_INPUT, 7) /* (D26) MCU_SPI1_CLK.WKUP_GPIO0_0 */ > + J721S2_WKUP_IOPAD(0x0fc, PIN_INPUT, 7) /* (D25) MCU_SPI1_CS2.WKUP_GPIO0_15*/ > + J721S2_WKUP_IOPAD(0x120, PIN_INPUT, 7) /* (G27) WKUP_GPIO0_56 */ > + J721S2_WKUP_IOPAD(0x17c, PIN_INPUT, 7) /* (J26) WKUP_GPIO0_57 */ > + J721S2_WKUP_IOPAD(0x184, PIN_INPUT, 7) /* (J27) WKUP_GPIO0_67 */ > + J721S2_WKUP_IOPAD(0x0cc, PIN_INPUT, 7) /* (C27) MCU_SPI1_CS0.WKUP_GPIO0_3 */ > + >; > + }; > +}; > + > +&main_gpio0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&rpi_header_gpio0_pins_default>; > }; > > &main_gpio2 { > @@ -235,7 +288,8 @@ &main_gpio6 { > }; > > &wkup_gpio0 { > - status = "disabled"; > + pinctrl-names = "default"; > + pinctrl-0 = <&mcu_rpi_header_gpio0_pins_default>; > }; > > &wkup_gpio1 { > @@ -273,6 +327,20 @@ exp1: gpio@21 { > }; > }; > > +&main_i2c4 { > + status = "okay"; > + pinctrl-names = "default"; > + pinctrl-0 = <&main_i2c4_pins_default>; > + clock-frequency = <400000>; > +}; > + > +&mcu_i2c0 { > + status = "okay"; > + pinctrl-names = "default"; > + pinctrl-0 = <&mcu_i2c0_pins_default>; > + clock-frequency = <400000>; > +}; > + > &main_sdhci0 { > /* Unused */ > status = "disabled"; > -- > 2.36.1 > > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2023-01-25 20:04 UTC | newest] Thread overview: 4+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2023-01-24 12:03 [PATCH V2 0/2] Fix WKUP domain IO PADCONFIG size issue and RPi header support Sinthu Raja 2023-01-24 12:03 ` [PATCH V2 1/2] arm64: dts: ti: k3-j721s2-mcu-wakeup: Fix IO PADCONFIG size for wakeup domain Sinthu Raja 2023-01-24 12:03 ` [PATCH V2 2/2] arm64: dts: ti: k3-am68-sk-base-board: Add pinmux for RPi Header Sinthu Raja 2023-01-25 20:04 ` Rahul T R
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