From: Johan Hovold <johan+linaro@kernel.org>
To: Alexandre Belloni <alexandre.belloni@bootlin.com>,
Bjorn Andersson <andersson@kernel.org>
Cc: Andy Gross <agross@kernel.org>,
Konrad Dybcio <konrad.dybcio@linaro.org>,
Alessandro Zummo <a.zummo@towertech.it>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Maximilian Luz <luzmaximilian@gmail.com>,
linux-arm-msm@vger.kernel.org, linux-rtc@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Johan Hovold <johan+linaro@kernel.org>
Subject: [PATCH 16/24] rtc: pm8xxx: add support for nvmem offset
Date: Thu, 26 Jan 2023 15:20:49 +0100 [thread overview]
Message-ID: <20230126142057.25715-17-johan+linaro@kernel.org> (raw)
In-Reply-To: <20230126142057.25715-1-johan+linaro@kernel.org>
On many Qualcomm platforms the PMIC RTC control and time registers are
read-only so that the RTC time can not be updated. Instead an offset
needs be stored in some machine-specific non-volatile memory, which the
driver can take into account.
Add support for storing a 32-bit offset from the Epoch in an nvmem cell
so that the RTC time can be set on such platforms.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
---
drivers/rtc/rtc-pm8xxx.c | 134 +++++++++++++++++++++++++++++++++++----
1 file changed, 123 insertions(+), 11 deletions(-)
diff --git a/drivers/rtc/rtc-pm8xxx.c b/drivers/rtc/rtc-pm8xxx.c
index 922aef0f0241..09816b9f6282 100644
--- a/drivers/rtc/rtc-pm8xxx.c
+++ b/drivers/rtc/rtc-pm8xxx.c
@@ -3,6 +3,7 @@
*/
#include <linux/of.h>
#include <linux/module.h>
+#include <linux/nvmem-consumer.h>
#include <linux/init.h>
#include <linux/rtc.h>
#include <linux/platform_device.h>
@@ -49,6 +50,8 @@ struct pm8xxx_rtc_regs {
* @alarm_irq: alarm irq number
* @regs: register description
* @dev: device structure
+ * @nvmem_cell: nvmem cell for offset
+ * @offset: offset from epoch in seconds
*/
struct pm8xxx_rtc {
struct rtc_device *rtc;
@@ -57,8 +60,60 @@ struct pm8xxx_rtc {
int alarm_irq;
const struct pm8xxx_rtc_regs *regs;
struct device *dev;
+ struct nvmem_cell *nvmem_cell;
+ u32 offset;
};
+static int pm8xxx_rtc_read_nvmem_offset(struct pm8xxx_rtc *rtc_dd)
+{
+ size_t len;
+ void *buf;
+ int rc;
+
+ buf = nvmem_cell_read(rtc_dd->nvmem_cell, &len);
+ if (IS_ERR(buf)) {
+ rc = PTR_ERR(buf);
+ dev_err(rtc_dd->dev, "failed to read nvmem offset: %d\n", rc);
+ return rc;
+ }
+
+ if (len != sizeof(u32)) {
+ dev_err(rtc_dd->dev, "unexpected nvmem cell size %zu\n", len);
+ kfree(buf);
+ return -EINVAL;
+ }
+
+ rtc_dd->offset = get_unaligned_le32(buf);
+
+ kfree(buf);
+
+ return 0;
+}
+
+static int pm8xxx_rtc_write_nvmem_offset(struct pm8xxx_rtc *rtc_dd, u32 offset)
+{
+ u8 buf[sizeof(u32)];
+ int rc;
+
+ put_unaligned_le32(offset, buf);
+
+ rc = nvmem_cell_write(rtc_dd->nvmem_cell, buf, sizeof(buf));
+ if (rc < 0) {
+ dev_err(rtc_dd->dev, "failed to write nvmem offset: %d\n", rc);
+ return rc;
+ }
+
+ return 0;
+}
+
+static int pm8xxx_rtc_read_offset(struct pm8xxx_rtc *rtc_dd)
+{
+ if (!rtc_dd->nvmem_cell)
+ return 0;
+
+ return pm8xxx_rtc_read_nvmem_offset(rtc_dd);
+}
+
static int pm8xxx_rtc_read_raw(struct pm8xxx_rtc *rtc_dd, u32 *secs)
{
const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
@@ -90,6 +145,33 @@ static int pm8xxx_rtc_read_raw(struct pm8xxx_rtc *rtc_dd, u32 *secs)
return 0;
}
+static int pm8xxx_rtc_update_offset(struct pm8xxx_rtc *rtc_dd, u32 secs)
+{
+ u32 raw_secs;
+ u32 offset;
+ int rc;
+
+ if (!rtc_dd->nvmem_cell)
+ return -ENODEV;
+
+ rc = pm8xxx_rtc_read_raw(rtc_dd, &raw_secs);
+ if (rc)
+ return rc;
+
+ offset = secs - raw_secs;
+
+ if (offset == rtc_dd->offset)
+ return 0;
+
+ rc = pm8xxx_rtc_write_nvmem_offset(rtc_dd, offset);
+ if (rc)
+ return rc;
+
+ rtc_dd->offset = offset;
+
+ return 0;
+}
+
/*
* Steps to write the RTC registers.
* 1. Disable alarm if enabled.
@@ -99,23 +181,15 @@ static int pm8xxx_rtc_read_raw(struct pm8xxx_rtc *rtc_dd, u32 *secs)
* 5. Enable rtc if disabled in step 2.
* 6. Enable alarm if disabled in step 1.
*/
-static int pm8xxx_rtc_set_time(struct device *dev, struct rtc_time *tm)
+static int __pm8xxx_rtc_set_time(struct pm8xxx_rtc *rtc_dd, u32 secs)
{
- struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
u8 value[NUM_8_BIT_RTC_REGS];
bool alarm_enabled;
- u32 secs;
int rc;
- if (!rtc_dd->allow_set_time)
- return -ENODEV;
-
- secs = rtc_tm_to_time64(tm);
put_unaligned_le32(secs, value);
- dev_dbg(dev, "set time: %ptRd %ptRt (%u)\n", tm, tm, secs);
-
rc = regmap_update_bits_check(rtc_dd->regmap, regs->alarm_ctrl,
regs->alarm_en, 0, &alarm_enabled);
if (rc)
@@ -158,6 +232,27 @@ static int pm8xxx_rtc_set_time(struct device *dev, struct rtc_time *tm)
return 0;
}
+static int pm8xxx_rtc_set_time(struct device *dev, struct rtc_time *tm)
+{
+ struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
+ u32 secs;
+ int rc;
+
+ secs = rtc_tm_to_time64(tm);
+
+ if (rtc_dd->allow_set_time)
+ rc = __pm8xxx_rtc_set_time(rtc_dd, secs);
+ else
+ rc = pm8xxx_rtc_update_offset(rtc_dd, secs);
+
+ if (rc)
+ return rc;
+
+ dev_dbg(dev, "set time: %ptRd %ptRt (%u + %u)\n", tm, tm,
+ secs - rtc_dd->offset, rtc_dd->offset);
+ return 0;
+}
+
static int pm8xxx_rtc_read_time(struct device *dev, struct rtc_time *tm)
{
struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
@@ -168,10 +263,11 @@ static int pm8xxx_rtc_read_time(struct device *dev, struct rtc_time *tm)
if (rc)
return rc;
+ secs += rtc_dd->offset;
rtc_time64_to_tm(secs, tm);
- dev_dbg(dev, "read time: %ptRd %ptRt (%u)\n", tm, tm, secs);
-
+ dev_dbg(dev, "read time: %ptRd %ptRt (%u + %u)\n", tm, tm,
+ secs - rtc_dd->offset, rtc_dd->offset);
return 0;
}
@@ -184,6 +280,7 @@ static int pm8xxx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
int rc;
secs = rtc_tm_to_time64(&alarm->time);
+ secs -= rtc_dd->offset;
put_unaligned_le32(secs, value);
rc = regmap_update_bits(rtc_dd->regmap, regs->alarm_ctrl,
@@ -223,6 +320,7 @@ static int pm8xxx_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
return rc;
secs = get_unaligned_le32(value);
+ secs += rtc_dd->offset;
rtc_time64_to_tm(secs, &alarm->time);
rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
@@ -380,9 +478,23 @@ static int pm8xxx_rtc_probe(struct platform_device *pdev)
rtc_dd->allow_set_time = of_property_read_bool(pdev->dev.of_node,
"allow-set-time");
+ rtc_dd->nvmem_cell = devm_nvmem_cell_get(&pdev->dev, "offset");
+ if (IS_ERR(rtc_dd->nvmem_cell)) {
+ rc = PTR_ERR(rtc_dd->nvmem_cell);
+ if (rc != -ENOENT)
+ return rc;
+ rtc_dd->nvmem_cell = NULL;
+ }
+
rtc_dd->regs = match->data;
rtc_dd->dev = &pdev->dev;
+ if (!rtc_dd->allow_set_time) {
+ rc = pm8xxx_rtc_read_offset(rtc_dd);
+ if (rc)
+ return rc;
+ }
+
rc = pm8xxx_rtc_enable(rtc_dd);
if (rc)
return rc;
--
2.39.1
next prev parent reply other threads:[~2023-01-26 14:23 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-26 14:20 [PATCH 00/24] rtc: pm8xxx: add support for setting time using nvmem Johan Hovold
2023-01-26 14:20 ` [PATCH 01/24] rtc: pm8xxx: fix set-alarm race Johan Hovold
2023-01-26 14:20 ` [PATCH 02/24] rtc: pm8xxx: drop spmi error messages Johan Hovold
2023-01-26 14:20 ` [PATCH 03/24] rtc: pm8xxx: use regmap_update_bits() Johan Hovold
2023-01-26 14:20 ` [PATCH 04/24] rtc: pm8xxx: drop bogus locking Johan Hovold
2023-01-26 14:20 ` [PATCH 05/24] rtc: pm8xxx: return IRQ_NONE on errors Johan Hovold
2023-01-26 14:20 ` [PATCH 06/24] rtc: pm8xxx: drop unused register defines Johan Hovold
2023-01-26 14:20 ` [PATCH 07/24] rtc: pm8xxx: use unaligned le32 helpers Johan Hovold
2023-01-26 14:20 ` [PATCH 08/24] rtc: pm8xxx: clean up time and alarm debugging Johan Hovold
2023-01-26 14:20 ` [PATCH 09/24] rtc: pm8xxx: rename struct device pointer Johan Hovold
2023-01-26 14:20 ` [PATCH 10/24] rtc: pm8xxx: rename alarm irq variable Johan Hovold
2023-01-26 14:20 ` [PATCH 11/24] rtc: pm8xxx: clean up comments Johan Hovold
2023-01-26 14:20 ` [PATCH 12/24] rtc: pm8xxx: use u32 for timestamps Johan Hovold
2023-01-26 14:20 ` [PATCH 13/24] rtc: pm8xxx: refactor read_time() Johan Hovold
2023-01-26 14:20 ` [PATCH 14/24] rtc: pm8xxx: clean up local declarations Johan Hovold
2023-01-26 14:20 ` [PATCH 15/24] dt-bindings: rtc: qcom-pm8xxx: add nvmem-cell offset Johan Hovold
2023-01-26 15:56 ` Krzysztof Kozlowski
2023-01-26 14:20 ` Johan Hovold [this message]
2023-01-27 14:13 ` [PATCH 16/24] rtc: pm8xxx: add support for nvmem offset Srinivas Kandagatla
2023-01-27 15:32 ` Johan Hovold
2023-01-27 15:09 ` Alexandre Belloni
2023-01-27 15:51 ` Johan Hovold
2023-01-27 16:05 ` Alexandre Belloni
2023-02-02 15:12 ` Johan Hovold
2023-02-02 15:21 ` Alexandre Belloni
2023-01-26 14:20 ` [PATCH 17/24] rtc: pm8xxx: add copyright notice Johan Hovold
2023-01-26 16:06 ` Alexandre Belloni
2023-01-27 13:04 ` Johan Hovold
2023-01-27 14:14 ` Krzysztof Kozlowski
2023-02-02 10:22 ` Johan Hovold
2023-01-26 14:20 ` [RFC 18/24] dt-bindings: rtc: qcom-pm8xxx: add uefi-variable offset Johan Hovold
2023-01-30 18:49 ` Rob Herring
2023-02-01 16:09 ` Johan Hovold
2023-02-09 16:59 ` Ard Biesheuvel
2023-01-26 14:20 ` [PATCH 19/24] rtc: pm8xxx: add support for uefi offset Johan Hovold
2023-01-26 14:27 ` Johan Hovold
2023-01-27 15:19 ` Alexandre Belloni
2023-01-27 15:26 ` Johan Hovold
2023-01-27 15:59 ` Alexandre Belloni
2023-01-26 14:20 ` [PATCH 20/24] arm64: defconfig: enable Qualcomm SDAM nvmem driver Johan Hovold
2023-01-26 14:20 ` [PATCH 21/24] arm64: dts: qcom: sc8280xp-pmics: add pmk8280 rtc Johan Hovold
2023-01-26 14:20 ` [PATCH 22/24] arm64: dts: qcom: sc8280xp-pmics: add pmk8280 sdam nvram Johan Hovold
2023-01-26 14:20 ` [PATCH 23/24] arm64: dts: qcom: sc8280xp-crd: enable rtc Johan Hovold
2023-01-26 14:20 ` [PATCH 24/24] arm64: dts: qcom: sc8280xp-x13s: " Johan Hovold
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