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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id z5-20020a9d62c5000000b0068bba70ab10sm143815otk.62.2023.01.27.13.19.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Jan 2023 13:19:45 -0800 (PST) Received: (nullmailer pid 699757 invoked by uid 1000); Fri, 27 Jan 2023 21:19:44 -0000 Date: Fri, 27 Jan 2023 15:19:44 -0600 From: Rob Herring To: Abel Vesa Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Krzysztof Kozlowski , "vkoul@kernel.org" , Kishon Vijay Abraham I , Philipp Zabel , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Linux Kernel Mailing List , linux-phy@lists.infradead.org Subject: Re: [PATCH v3 1/8] dt-bindings: phy: Add qcom,snps-eusb2-phy schema file Message-ID: <20230127211944.GA696408-robh@kernel.org> References: <20230126131415.1453741-1-abel.vesa@linaro.org> <20230126131415.1453741-2-abel.vesa@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230126131415.1453741-2-abel.vesa@linaro.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Thu, Jan 26, 2023 at 03:14:08PM +0200, Abel Vesa wrote: > The SM8550 SoC uses Synopsis eUSB2 PHY. Add a dt-binding schema > for the new driver. > > Signed-off-by: Abel Vesa > --- > > The v2 version of this patch was here: > https://lore.kernel.org/all/20230126124651.1362533-2-abel.vesa@linaro.org/ > > Changes since v2: > * none > > Changes since v1: > * dropped the "ref src" clock > * dropped the usb-repeater property > > .../bindings/phy/qcom,snps-eusb2-phy.yaml | 78 +++++++++++++++++++ > 1 file changed, 78 insertions(+) > create mode 100644 Documentation/devicetree/bindings/phy/qcom,snps-eusb2-phy.yaml > > diff --git a/Documentation/devicetree/bindings/phy/qcom,snps-eusb2-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,snps-eusb2-phy.yaml > new file mode 100644 > index 000000000000..49a5dad486c2 > --- /dev/null > +++ b/Documentation/devicetree/bindings/phy/qcom,snps-eusb2-phy.yaml > @@ -0,0 +1,78 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > + Remove blank line > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/phy/qcom,snps-eusb2-phy.yaml#" > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" Drop quotes > + > +title: Qualcomm SNPS eUSB2 phy controller > + > +maintainers: > + - Abel Vesa > + > +description: > + eUSB2 controller supports LS/FS/HS usb connectivity on Qualcomm chipsets. > + > +properties: > + compatible: > + const: qcom,sm8550-snps-eusb2-phy > + > + reg: > + maxItems: 1 > + > + "#phy-cells": > + const: 0 > + > + clocks: > + items: > + - description: ref > + > + clock-names: > + items: > + - const: ref > + > + resets: > + maxItems: 1 > + description: > + Phandle to reset to phy block. Drop description. > + > + vdd-supply: > + description: > + Phandle to 0.88V regulator supply to PHY digital circuit. > + > + vdda12-supply: > + description: > + Phandle to 1.2V regulator supply to PHY refclk pll block. > + > +required: > + - compatible > + - reg > + - "#phy-cells" > + - clocks > + - clock-names > + - vdd-supply > + - vdda12-supply > + - resets > + > +additionalProperties: false > + > +examples: > + - | > + #include > + #include > + #include > + > + usb_1_hsphy: phy@88e3000 { > + compatible = "qcom,sm8550-snps-eusb2-phy"; > + reg = <0x88e3000 0x154>; > + #phy-cells = <0>; > + > + clocks = <&rpmhcc RPMH_CXO_PAD_CLK>, > + <&tcsrcc TCSR_USB2_CLKREF_EN>; > + clock-names = "ref_src", "ref"; Doesn't match the schema. > + > + vdd-supply = <&vreg_l1e_0p88>; > + vdda12-supply = <&vreg_l3e_1p2>; > + > + resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; > + }; > -- > 2.34.1 >