From: Rob Herring <robh@kernel.org>
To: "Rafał Miłecki" <zajec5@gmail.com>
Cc: "Srinivas Kandagatla" <srinivas.kandagatla@linaro.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Michael Walle" <michael@walle.cc>,
devicetree@vger.kernel.org, linux-mtd@lists.infradead.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, "Rafał Miłecki" <rafal@milecki.pl>
Subject: Re: [PATCH 1/2] dt-bindings: nvmem: io: new binding for IO accessible NVMEM devices
Date: Mon, 30 Jan 2023 14:32:51 -0600 [thread overview]
Message-ID: <20230130203251.GA3290808-robh@kernel.org> (raw)
In-Reply-To: <20230127175831.26753-1-zajec5@gmail.com>
On Fri, Jan 27, 2023 at 06:58:30PM +0100, Rafał Miłecki wrote:
> From: Rafał Miłecki <rafal@milecki.pl>
>
> With the NVMEM layouts binding in place we should now use:
> 1. NVMEM device access bindings
> 2. NVMEM content description bindings
>
> This binding allows describing NVMEM devices that can be accessed using
> IO mappings.
>
> Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
> ---
> .../devicetree/bindings/nvmem/io.yaml | 37 +++++++++++++++++++
What do we call nvmem using ISA/PCI IO space? That was my first thought
seeing "IO". Probably unlikely, but still. "MMIO" instead?
> 1 file changed, 37 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/nvmem/io.yaml
>
> diff --git a/Documentation/devicetree/bindings/nvmem/io.yaml b/Documentation/devicetree/bindings/nvmem/io.yaml
> new file mode 100644
> index 000000000000..67e0aae9cd94
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/nvmem/io.yaml
> @@ -0,0 +1,37 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/nvmem/io.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: IO access based NVMEM
> +
> +description: |
> + This binding describes simple NVMEM devices that can be accessed by simply
> + mapping a predefined IO address.
> +
> + It's a generic solution for providing NVMEM content access. The way of
> + handling actual content may be device specific and can be described using a
> + proper layout.
As the accesses are memory-mapped, the child nodes should also have
memory-mapped addresses. IOW, you need 'ranges', '#address-cells',
'#size-cells'.
> +
> +maintainers:
> + - Rafał Miłecki <rafal@milecki.pl>
> +
> +allOf:
> + - $ref: nvmem.yaml#
> +
> +properties:
> + compatible:
> + const: io-nvmem
> +
> + reg:
> + maxItems: 1
The first addition here will be access size restrictions. Perhaps add
that now (reg-io-width).
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + nvmem@10000 {
> + compatible = "io-nvmem";
> + reg = <0x10000000 0x10000>;
> + };
> --
> 2.34.1
>
prev parent reply other threads:[~2023-01-30 20:33 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-27 17:58 [PATCH 1/2] dt-bindings: nvmem: io: new binding for IO accessible NVMEM devices Rafał Miłecki
2023-01-27 17:58 ` [PATCH 2/2] nvmem: add generic driver for devices with I/O based access Rafał Miłecki
2023-01-30 20:56 ` Rob Herring
2023-01-30 20:32 ` Rob Herring [this message]
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