From: Yong Wu <yong.wu@mediatek.com>
To: Joerg Roedel <joro@8bytes.org>, Will Deacon <will@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>
Cc: Robin Murphy <robin.murphy@arm.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Yong Wu <yong.wu@mediatek.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
<iommu@lists.linux.dev>, <linux-mediatek@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<mingyuan.ma@mediatek.com>, <yf.wang@mediatek.com>,
<jianjiao.zeng@mediatek.com>, <chengci.xu@mediatek.com>,
<youlin.pei@mediatek.com>
Subject: [PATCH v7 6/6] iommu/mediatek: mt8188: Add iova_region_larb_msk
Date: Thu, 16 Feb 2023 13:33:22 +0800 [thread overview]
Message-ID: <20230216053322.11596-7-yong.wu@mediatek.com> (raw)
In-Reply-To: <20230216053322.11596-1-yong.wu@mediatek.com>
Add iova_region_larb_msk for mt8188. We separate the 16GB iova regions
by each device's larbid/portid.
Refer to include/dt-bindings/memory/mediatek,mt8188-memory-port.h
Note: larb19(21) as commented in that h above, it means larb19 while its SW
index is 21.
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
---
drivers/iommu/mtk_iommu.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index a3012fdc8f61..7dc7cd510a8b 100644
--- a/drivers/iommu/mtk_iommu.c
+++ b/drivers/iommu/mtk_iommu.c
@@ -1595,6 +1595,20 @@ static const struct mtk_iommu_plat_data mt8188_data_infra = {
.iova_region_nr = ARRAY_SIZE(single_domain),
};
+static const u32 mt8188_larb_region_msk[MT8192_MULTI_REGION_NR_MAX][MTK_LARB_NR_MAX] = {
+ [0] = {~0, ~0, ~0, ~0}, /* Region0: all ports for larb0/1/2/3 */
+ [1] = {0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, ~0, ~0, ~0}, /* Region1: larb19(21)/21(22)/23 */
+ [2] = {0, 0, 0, 0, ~0, ~0, ~0, ~0, /* Region2: the other larbs. */
+ ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0,
+ ~0, ~0, ~0, ~0, ~0, 0, 0, 0,
+ 0, ~0},
+ [3] = {0},
+ [4] = {[24] = BIT(0) | BIT(1)}, /* Only larb27(24) port0/1 */
+ [5] = {[24] = BIT(2) | BIT(3)}, /* Only larb27(24) port2/3 */
+};
+
static const struct mtk_iommu_plat_data mt8188_data_vdo = {
.m4u_plat = M4U_MT8188,
.flags = HAS_BCLK | HAS_SUB_COMM_3BITS | OUT_ORDER_WR_EN |
@@ -1606,6 +1620,7 @@ static const struct mtk_iommu_plat_data mt8188_data_vdo = {
.banks_enable = {true},
.iova_region = mt8192_multi_dom,
.iova_region_nr = ARRAY_SIZE(mt8192_multi_dom),
+ .iova_region_larb_msk = mt8188_larb_region_msk,
.larbid_remap = {{2}, {0}, {21}, {0}, {19}, {9, 10,
11 /* 11a */, 25 /* 11c */},
{13, 0, 29 /* 16b */, 30 /* 17b */, 0}, {5}},
@@ -1622,6 +1637,7 @@ static const struct mtk_iommu_plat_data mt8188_data_vpp = {
.banks_enable = {true},
.iova_region = mt8192_multi_dom,
.iova_region_nr = ARRAY_SIZE(mt8192_multi_dom),
+ .iova_region_larb_msk = mt8188_larb_region_msk,
.larbid_remap = {{1}, {3}, {23}, {7}, {MTK_INVALID_LARBID},
{12, 15, 24 /* 11b */}, {14, MTK_INVALID_LARBID,
16 /* 16a */, 17 /* 17a */, MTK_INVALID_LARBID,
--
2.18.0
prev parent reply other threads:[~2023-02-16 5:35 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-16 5:33 [PATCH v7 0/6] MT8188 IOMMU SUPPORT Yong Wu
2023-02-16 5:33 ` [PATCH v7 1/6] dt-bindings: mediatek: mt8188: Add binding for MM & INFRA IOMMU Yong Wu
2023-02-17 9:23 ` Krzysztof Kozlowski
2023-02-16 5:33 ` [PATCH v7 2/6] iommu/mediatek: Fix two IOMMU share pagetable issue Yong Wu
2023-02-16 5:33 ` [PATCH v7 3/6] iommu/mediatek: Adjust mtk_iommu_config flow Yong Wu
2023-02-16 5:33 ` [PATCH v7 4/6] iommu/mediatek: Add enable IOMMU SMC command for INFRA master Yong Wu
2023-02-16 5:33 ` [PATCH v7 5/6] iommu/mediatek: Add MT8188 IOMMU Support Yong Wu
2023-02-16 5:33 ` Yong Wu [this message]
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