From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C4C8FC05027 for ; Fri, 17 Feb 2023 11:16:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229976AbjBQLQx (ORCPT ); Fri, 17 Feb 2023 06:16:53 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60328 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229992AbjBQLQr (ORCPT ); Fri, 17 Feb 2023 06:16:47 -0500 Received: from mail-lj1-x230.google.com (mail-lj1-x230.google.com [IPv6:2a00:1450:4864:20::230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AA9343B85A for ; Fri, 17 Feb 2023 03:16:26 -0800 (PST) Received: by mail-lj1-x230.google.com with SMTP id e30so756642ljb.8 for ; Fri, 17 Feb 2023 03:16:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=0e01nddNNggomilaOmguOcFx036Ua8m431JWLUtouH8=; b=CFjALJfnxDN/Vkk/EMv9EpN+uCLAJekJSpOmCzBM9HXaRJ1JDo7s2RCA5W9MOFiU4O LSz8x1NWXU/in4bBl5bfF+OzpMaO0it5JqnthD7bg3demWpykgfsjuLvr9zKwHciV5wm ntBwFtaAAlAt3gNjbBxObFbRG1Mw+QvPpogE+FebZvekkA1XJuhO4OwosATUot/pcB39 CdXW73vyWq+1LejmEunqRaXoQdvoAvZS653gC2SD1x+g4TwVsANDagPpvF42OqrznDVj 6TUy8oUbhmODSfsNDQLct/ogTWOGCZMbxm8pCozighMcbny1GUQ1RQQ9uf+t7CHnHjXG jNUA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=0e01nddNNggomilaOmguOcFx036Ua8m431JWLUtouH8=; b=syqu3AI2uIZLIec/zYCbIgTzLf3roAYzDcDro3PMdZnIoMKLS2cUqT8CLe7eAewU/e U3L5p59OFtt+9Kh9ScboRxDrbaE3rqyXSsxtaX5E0rOVKz34RWYd8WS2iU9I4b1LAHMP IXYbywn7sPkPSRk0vZoC3dFr9WyJia0srsyH4zvxJTkOp1A4fS6IRVTJ2lk3YfjH7M6e H4XoYypCMRm1fqN4Uryyc19GoTIgwqm5LpWw76gPd5D+CAkRpAeTUeHuIfFW1vsXl3Lt 2MfzLibkjeVdiXI/gureE9eL36wZnhqZ8gae5g76HjFv4zx5J8FERXtMd/LnsZzp0gzd ydpg== X-Gm-Message-State: AO0yUKWspuZxCdNnphSPSoZsU5Nxp4555HvcSzw+xOqMLYeUYOqi2KSf bAOLgKiJAdJ3mLRwJ8HEWk7WkQ== X-Google-Smtp-Source: AK7set8UZtt/gDomOxIqtofjuy2wALx/F9R2DtKLK8ThMjlMdmnvCx7zhJ+vQFPf9RFthPrvueUFsA== X-Received: by 2002:a2e:574b:0:b0:294:712a:5190 with SMTP id r11-20020a2e574b000000b00294712a5190mr739293ljd.28.1676632584963; Fri, 17 Feb 2023 03:16:24 -0800 (PST) Received: from localhost.localdomain (abxh117.neoplus.adsl.tpnet.pl. [83.9.1.117]) by smtp.gmail.com with ESMTPSA id u21-20020a2e9b15000000b002935899fe3fsm554818lji.116.2023.02.17.03.16.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Feb 2023 03:16:24 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Will Deacon , Robin Murphy , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 4/6] arm64: dts: qcom: sm8150: Add qcom,smmu-500 to Adreno SMMU Date: Fri, 17 Feb 2023 12:16:11 +0100 Message-Id: <20230217111613.306978-4-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230217111613.306978-1-konrad.dybcio@linaro.org> References: <20230217111613.306978-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the fallback Qualcomm SMMU500 compatible to the Adreno SMMU. Signed-off-by: Konrad Dybcio --- v1 -> v2: No changes arch/arm64/boot/dts/qcom/sm8150.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index d94171f9b73d..3da77141a164 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -2287,7 +2287,8 @@ gpucc: clock-controller@2c90000 { }; adreno_smmu: iommu@2ca0000 { - compatible = "qcom,sm8150-smmu-500", "qcom,adreno-smmu", "arm,mmu-500"; + compatible = "qcom,sm8150-smmu-500", "qcom,adreno-smmu", + "qcom,smmu-500", "arm,mmu-500"; reg = <0 0x02ca0000 0 0x10000>; #iommu-cells = <2>; #global-interrupts = <1>; -- 2.39.1