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From: Chester Lin <clin@suse.com>
To: "Linus Walleij" <linus.walleij@linaro.org>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Andreas Färber" <afaerber@suse.de>
Cc: Chester Lin <clin@suse.com>,
	s32@nxp.com, linux-gpio@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Larisa Grigore <larisa.grigore@nxp.com>,
	Ghennadi Procopciuc <Ghennadi.Procopciuc@oss.nxp.com>,
	Andrei Stefanescu <andrei.stefanescu@nxp.com>,
	Radu Pirea <radu-nicolae.pirea@nxp.com>,
	Matthias Brugger <mbrugger@suse.com>
Subject: [PATCH v5 0/3] Add pinctrl support for S32 SoC family
Date: Mon, 20 Feb 2023 10:33:17 +0800	[thread overview]
Message-ID: <20230220023320.3499-1-clin@suse.com> (raw)

Hello,

Here I want to introduce a new patch series, which aims to support IOMUX
functions provided by SIUL2 [System Integration Unit Lite2] on S32 SoCs,
such as S32G2. This series is originally from NXP's implementation on
nxp-auto-linux repo[1] and it will be required by upstream kernel for
supporting a variety of devices on S32 SoCs which need to config PINMUXs,
such as PHYs and MAC controllers.

Thanks,
Chester

Changes in v5:
- dt-bindings: No change
- driver:
  - Refactor register r/w access based on REGMAP_MMIO and regmap APIs.
  - Tag PM functions with '__maybe_unused'.
  - Add mask check while parsing pin ID from a pinmux value.
  - Simplify s32_pinconf_mscr_* functions.

Changes in v4:
- Link: https://lore.kernel.org/linux-arm-kernel/20230118094728.3814-2-clin@suse.com/T/
- dt-bindings:
  - Change the representation of available slew-rate DT values from
    register values to real frequencies.
- driver:
  - Add a mapping table for converting the slew rates to register
    settings.
  - Move driver files into an independent folder drivers/pinctrl/nxp
- Add a MAINTAINER patch.

Changes in v3:
- Link: https://lore.kernel.org/lkml/20221221073232.21888-1-clin@suse.com/T/
- dt-bindings:
  - Remove the minItems from reg because there's no optional item for
    s32g2.
  - List supported properties of pinmux-node and pincfg-node and add more
    descriptions.
  - Adjust the location of "required:".
  - Fix descriptions and wordings.
  - Rename the yaml file to nxp,s32g2-siul2-pinctrl.yaml.
- Rename pinctrl-s32g.c to pinctrl-s32g2.c
- Adjust Kconfig options [menu-invisible] and names [S32G -> S32G2].
- Add .suppress_bind_attrs
- Drop the .remove callback and replace the module_platform_driver() call
  with builtin_platform_driver()

Changes in v2:
- Link: https://lore.kernel.org/lkml/20221128054820.1771-1-clin@suse.com/T/
- Move the "nxp,pins" ID range information from DT to the driver.
- dt-bindings:
  - Fix schema issues.
  - Add descriptions for reg entries.
  - Revise the example.
- Refine the compatible name from "nxp,s32g-..." to "nxp,s32g2-...".
- Fix the copyright format suggested by NXP.

[1] https://github.com/nxp-auto-linux/linux/tree/bsp35.0-5.15.73-rt

Chester Lin (3):
  dt-bindings: pinctrl: add schema for NXP S32 SoCs
  pinctrl: add NXP S32 SoC family support
  MAINTAINERS: Add NXP S32 pinctrl maintainer and reviewer

 .../pinctrl/nxp,s32g2-siul2-pinctrl.yaml      | 123 +++
 MAINTAINERS                                   |   8 +
 drivers/pinctrl/Kconfig                       |   1 +
 drivers/pinctrl/Makefile                      |   1 +
 drivers/pinctrl/nxp/Kconfig                   |  15 +
 drivers/pinctrl/nxp/Makefile                  |   4 +
 drivers/pinctrl/nxp/pinctrl-s32.h             |  75 ++
 drivers/pinctrl/nxp/pinctrl-s32cc.c           | 945 ++++++++++++++++++
 drivers/pinctrl/nxp/pinctrl-s32g2.c           | 773 ++++++++++++++
 9 files changed, 1945 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pinctrl/nxp,s32g2-siul2-pinctrl.yaml
 create mode 100644 drivers/pinctrl/nxp/Kconfig
 create mode 100644 drivers/pinctrl/nxp/Makefile
 create mode 100644 drivers/pinctrl/nxp/pinctrl-s32.h
 create mode 100644 drivers/pinctrl/nxp/pinctrl-s32cc.c
 create mode 100644 drivers/pinctrl/nxp/pinctrl-s32g2.c

-- 
2.37.3


             reply	other threads:[~2023-02-20  2:33 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-20  2:33 Chester Lin [this message]
2023-02-20  2:33 ` [PATCH v5 1/3] dt-bindings: pinctrl: add schema for NXP S32 SoCs Chester Lin
2023-02-20  2:33 ` [PATCH v5 2/3] pinctrl: add NXP S32 SoC family support Chester Lin
2023-03-06 23:28   ` andy.shevchenko
2023-03-08  5:03     ` Chester Lin
2023-03-08  5:21       ` Chester Lin
2023-03-08 13:21       ` Andy Shevchenko
2023-03-08 16:42         ` Chester Lin
2023-03-08 17:04           ` Chester Lin
2023-03-09 12:50             ` Andy Shevchenko
2023-02-20  2:33 ` [PATCH v5 3/3] MAINTAINERS: Add NXP S32 pinctrl maintainer and reviewer Chester Lin
2023-03-06 13:28 ` [PATCH v5 0/3] Add pinctrl support for S32 SoC family Linus Walleij
2023-03-06 23:28   ` andy.shevchenko
2023-03-07  9:22     ` Linus Walleij
2023-03-07  9:55       ` Andy Shevchenko
2023-03-07 12:49         ` Linus Walleij
2023-03-07 13:09           ` Chester Lin
2023-03-07 14:53             ` Chester Lin
2023-03-07 18:35               ` Andy Shevchenko

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