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From: Sam Protsenko <semen.protsenko@linaro.org>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	Chanwoo Choi <cw00.choi@samsung.com>,
	Sylwester Nawrocki <s.nawrocki@samsung.com>,
	Rob Herring <robh+dt@kernel.org>
Cc: David Virag <virag.david003@gmail.com>,
	Chanho Park <chanho61.park@samsung.com>,
	Alim Akhtar <alim.akhtar@samsung.com>,
	Sumit Semwal <sumit.semwal@linaro.org>,
	Tomasz Figa <tomasz.figa@gmail.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH v2 1/6] dt-bindings: clock: exynos850: Add Exynos850 CMU_G3D
Date: Wed, 22 Feb 2023 22:21:28 -0600	[thread overview]
Message-ID: <20230223042133.26551-2-semen.protsenko@linaro.org> (raw)
In-Reply-To: <20230223042133.26551-1-semen.protsenko@linaro.org>

CMU_G3D generates Gondul GPU and bus clocks for BLK_G3D.
Add clock indices and binding documentation for CMU_G3D.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
---
Changes in v2:
  - Rebased on top of most recent soc/for-next tree
  - Added Rob Herring Acked-by tag

 .../clock/samsung,exynos850-clock.yaml        | 19 ++++++++++++++++++
 include/dt-bindings/clock/exynos850.h         | 20 ++++++++++++++++++-
 2 files changed, 38 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml
index 141cf173f87d..8aa87b8c1b33 100644
--- a/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml
+++ b/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml
@@ -37,6 +37,7 @@ properties:
       - samsung,exynos850-cmu-cmgp
       - samsung,exynos850-cmu-core
       - samsung,exynos850-cmu-dpu
+      - samsung,exynos850-cmu-g3d
       - samsung,exynos850-cmu-hsi
       - samsung,exynos850-cmu-is
       - samsung,exynos850-cmu-mfcmscl
@@ -169,6 +170,24 @@ allOf:
             - const: oscclk
             - const: dout_dpu
 
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: samsung,exynos850-cmu-g3d
+
+    then:
+      properties:
+        clocks:
+          items:
+            - description: External reference clock (26 MHz)
+            - description: G3D clock (from CMU_TOP)
+
+        clock-names:
+          items:
+            - const: oscclk
+            - const: dout_g3d_switch
+
   - if:
       properties:
         compatible:
diff --git a/include/dt-bindings/clock/exynos850.h b/include/dt-bindings/clock/exynos850.h
index 88d5289883d3..8bb62e43fd60 100644
--- a/include/dt-bindings/clock/exynos850.h
+++ b/include/dt-bindings/clock/exynos850.h
@@ -85,7 +85,10 @@
 #define CLK_DOUT_MFCMSCL_M2M		73
 #define CLK_DOUT_MFCMSCL_MCSC		74
 #define CLK_DOUT_MFCMSCL_JPEG		75
-#define TOP_NR_CLK			76
+#define CLK_MOUT_G3D_SWITCH		76
+#define CLK_GOUT_G3D_SWITCH		77
+#define CLK_DOUT_G3D_SWITCH		78
+#define TOP_NR_CLK			79
 
 /* CMU_APM */
 #define CLK_RCO_I3C_PMIC		1
@@ -195,6 +198,21 @@
 #define CLK_GOUT_SYSREG_CMGP_PCLK	15
 #define CMGP_NR_CLK			16
 
+/* CMU_G3D */
+#define CLK_FOUT_G3D_PLL		1
+#define CLK_MOUT_G3D_PLL		2
+#define CLK_MOUT_G3D_SWITCH_USER	3
+#define CLK_MOUT_G3D_BUSD		4
+#define CLK_DOUT_G3D_BUSP		5
+#define CLK_GOUT_G3D_CMU_G3D_PCLK	6
+#define CLK_GOUT_G3D_GPU_CLK		7
+#define CLK_GOUT_G3D_TZPC_PCLK		8
+#define CLK_GOUT_G3D_GRAY2BIN_CLK	9
+#define CLK_GOUT_G3D_BUSD_CLK		10
+#define CLK_GOUT_G3D_BUSP_CLK		11
+#define CLK_GOUT_G3D_SYSREG_PCLK	12
+#define G3D_NR_CLK			13
+
 /* CMU_HSI */
 #define CLK_MOUT_HSI_BUS_USER		1
 #define CLK_MOUT_HSI_MMC_CARD_USER	2
-- 
2.39.1


  reply	other threads:[~2023-02-23  4:23 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-23  4:21 [PATCH v2 0/6] clk: samsung: exynos850: Add missing clocks for PM Sam Protsenko
2023-02-23  4:21 ` Sam Protsenko [this message]
2023-02-23  4:21 ` [PATCH v2 2/6] dt-bindings: clock: exynos850: Add AUD and HSI main gate clocks Sam Protsenko
2023-02-23  4:21 ` [PATCH v2 3/6] clk: samsung: clk-pll: Implement pll0818x PLL type Sam Protsenko
2023-02-23  4:21 ` [PATCH v2 4/6] clk: samsung: exynos850: Implement CMU_G3D domain Sam Protsenko
2023-02-23  4:21 ` [PATCH v2 5/6] clk: samsung: exynos850: Add AUD and HSI main gate clocks Sam Protsenko
2023-02-23  4:21 ` [PATCH v2 6/6] arm64: dts: exynos: Add CMU_G3D node for Exynos850 SoC Sam Protsenko
     [not found] ` <CGME20230223042126epcas2p11c50a7be714a7f305d743faa68dee3ca@epcms2p5>
2023-02-27  3:56   ` [PATCH v2 5/6] clk: samsung: exynos850: Add AUD and HSI main gate clocks CHANHO PARK
2023-03-06 14:28 ` [PATCH v2 0/6] clk: samsung: exynos850: Add missing clocks for PM Krzysztof Kozlowski
2023-03-06 15:51   ` Krzysztof Kozlowski
2023-03-06 18:55     ` Sam Protsenko
2023-03-07  7:47       ` Krzysztof Kozlowski
2023-03-07 17:37         ` Sam Protsenko

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