From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: andersson@kernel.org, lpieralisi@kernel.org, robh@kernel.org,
kw@linux.com, krzysztof.kozlowski+dt@linaro.org,
vkoul@kernel.org, konrad.dybcio@linaro.org, bhelgaas@google.com,
kishon@kernel.org, linux-arm-msm@vger.kernel.org,
linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-pci@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH 02/11] dt-bindings: PCI: qcom: Add iommu properties
Date: Thu, 23 Feb 2023 18:32:58 +0530 [thread overview]
Message-ID: <20230223130258.GA6422@workstation> (raw)
In-Reply-To: <896e047a-9188-de5d-d3fd-197b3fa208da@linaro.org>
On Thu, Feb 23, 2023 at 10:37:27AM +0100, Krzysztof Kozlowski wrote:
> On 22/02/2023 16:32, Manivannan Sadhasivam wrote:
> > Most of the PCIe controllers require iommu support to function properly.
> > So let's add them to the binding.
> >
>
> If most of them require iommu, why not adding it as a required property
> to respective (or new) "if:then:" part?
>
Well, I thought about it but then followed the convention of
"dma-coherent" property. I asked this same question while adding that
property but I didn't get a clear answer (or maybe I missed something).
So if you want me to add iommu properties to individual SoCs, then please
explain why the same cannot be done for "dma-coherent" as not all SoCs
support dma coherency for PCIe controllers.
Thanks,
Mani
> Best regards,
> Krzysztof
>
next prev parent reply other threads:[~2023-02-23 13:03 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-22 15:32 [PATCH 00/11] Add PCIe RC support to Qcom SDX55 SoC Manivannan Sadhasivam
2023-02-22 15:32 ` [PATCH 01/11] dt-bindings: PCI: qcom: Update maintainers entry Manivannan Sadhasivam
2023-02-23 9:36 ` Krzysztof Kozlowski
2023-02-22 15:32 ` [PATCH 02/11] dt-bindings: PCI: qcom: Add iommu properties Manivannan Sadhasivam
2023-02-23 9:37 ` Krzysztof Kozlowski
2023-02-23 13:02 ` Manivannan Sadhasivam [this message]
2023-02-22 15:32 ` [PATCH 03/11] dt-bindings: PCI: qcom: Add SDX55 SoC Manivannan Sadhasivam
2023-02-23 9:38 ` Krzysztof Kozlowski
2023-02-22 15:32 ` [PATCH 04/11] dt-bindings: PCI: qcom-ep: Fix the unit address used in example Manivannan Sadhasivam
2023-02-23 9:38 ` Krzysztof Kozlowski
2023-02-22 15:32 ` [PATCH 05/11] ARM: dts: qcom: sdx55: Fix the unit address of PCIe EP node Manivannan Sadhasivam
2023-02-22 16:02 ` Konrad Dybcio
2023-02-23 13:04 ` Manivannan Sadhasivam
2023-02-22 15:32 ` [PATCH 06/11] ARM: dts: qcom: sdx55: Rename pcie0_{phy/lane} to pcie_{phy/lane} Manivannan Sadhasivam
2023-02-22 16:45 ` Konrad Dybcio
2023-02-22 15:32 ` [PATCH 07/11] ARM: dts: qcom: sdx55: Add support for PCIe RC controller Manivannan Sadhasivam
2023-02-22 16:03 ` Konrad Dybcio
2023-02-22 15:32 ` [PATCH 08/11] ARM: dts: qcom: sdx55-t55: Enable PCIe RC support Manivannan Sadhasivam
2023-02-22 16:04 ` Konrad Dybcio
2023-02-22 15:32 ` [PATCH 09/11] phy: qcom-qmp-pcie: Split out EP related init sequence for SDX55 Manivannan Sadhasivam
2023-02-22 15:32 ` [PATCH 10/11] phy: qcom-qmp-pcie: Add RC " Manivannan Sadhasivam
2023-02-22 15:32 ` [PATCH 11/11] PCI: qcom: Add support for SDX55 SoC Manivannan Sadhasivam
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230223130258.GA6422@workstation \
--to=manivannan.sadhasivam@linaro.org \
--cc=andersson@kernel.org \
--cc=bhelgaas@google.com \
--cc=devicetree@vger.kernel.org \
--cc=kishon@kernel.org \
--cc=konrad.dybcio@linaro.org \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=krzysztof.kozlowski@linaro.org \
--cc=kw@linux.com \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=linux-phy@lists.infradead.org \
--cc=lpieralisi@kernel.org \
--cc=robh@kernel.org \
--cc=vkoul@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).