From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 30AD1C64EC7 for ; Tue, 28 Feb 2023 11:41:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229972AbjB1LlV (ORCPT ); Tue, 28 Feb 2023 06:41:21 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39434 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229591AbjB1LlV (ORCPT ); Tue, 28 Feb 2023 06:41:21 -0500 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 3610F2D162 for ; Tue, 28 Feb 2023 03:41:19 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 236A6FEC; Tue, 28 Feb 2023 03:42:02 -0800 (PST) Received: from donnerap.arm.com (donnerap.cambridge.arm.com [10.1.197.42]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id BB2E03F881; Tue, 28 Feb 2023 03:41:17 -0800 (PST) From: Andre Przywara To: Rob Herring , Krzysztof Kozlowski , Chen-Yu Tsai , Samuel Holland , Jernej Skrabec Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev Subject: [PATCH] arm64: dts: allwinner: h5: OrangePi PC2: add OPP table to enable DVFS Date: Tue, 28 Feb 2023 11:41:12 +0000 Message-Id: <20230228114112.3340715-1-andre.przywara@arm.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org So far the OrangePi PC2 board was running at a fixed frequency, set by U-Boot to 816 MHz, which is the best achievable frequency at the 1.1V CPU voltage provided by the PMIC at reset. We already describe the CPU voltage regulator in the DT, but were missing the OPP table. Just include the default H5 OPP table, as used by other boards. My OrangePi PC2 runs just fine with those values, and now goes up to 1.15 GHz. Signed-off-by: Andre Przywara --- arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts index b5c1ff19b4c41..ce3ae19e72dbd 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts @@ -3,6 +3,7 @@ /dts-v1/; #include "sun50i-h5.dtsi" +#include "sun50i-h5-cpu-opp.dtsi" #include #include -- 2.25.1