From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: andersson@kernel.org
Cc: konrad.dybcio@linaro.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
arnd@arndb.de,
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Subject: [PATCH 10/16] arm64: dts: qcom: sc8280xp: Fix the PCI I/O port range
Date: Tue, 28 Feb 2023 22:17:46 +0530 [thread overview]
Message-ID: <20230228164752.55682-11-manivannan.sadhasivam@linaro.org> (raw)
In-Reply-To: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org>
For 1MiB of the I/O region, the I/O ports of the legacy PCI devices are
located in the range of 0x0 to 0x100000. Hence, fix the bogus PCI addresses
(0x30200000, 0x32200000, 0x34200000, 0x38200000, 0x3c200000) specified in
the ranges property for I/O region.
Fixes: 813e83157001 ("arm64: dts: qcom: sc8280xp/sa8540p: add PCIe2-4 nodes")
Reported-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/linux-arm-msm/7c5dfa87-41df-4ba7-b0e4-72c8386402a8@app.fastmail.com/
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
index 0d02599d8867..a0065656442c 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
@@ -1657,7 +1657,7 @@ pcie4: pcie@1c00000 {
reg-names = "parf", "dbi", "elbi", "atu", "config";
#address-cells = <3>;
#size-cells = <2>;
- ranges = <0x01000000 0x0 0x30200000 0x0 0x30200000 0x0 0x100000>,
+ ranges = <0x01000000 0x0 0x00000000 0x0 0x30200000 0x0 0x100000>,
<0x02000000 0x0 0x30300000 0x0 0x30300000 0x0 0x1d00000>;
bus-range = <0x00 0xff>;
@@ -1756,7 +1756,7 @@ pcie3b: pcie@1c08000 {
reg-names = "parf", "dbi", "elbi", "atu", "config";
#address-cells = <3>;
#size-cells = <2>;
- ranges = <0x01000000 0x0 0x32200000 0x0 0x32200000 0x0 0x100000>,
+ ranges = <0x01000000 0x0 0x00000000 0x0 0x32200000 0x0 0x100000>,
<0x02000000 0x0 0x32300000 0x0 0x32300000 0x0 0x1d00000>;
bus-range = <0x00 0xff>;
@@ -1853,7 +1853,7 @@ pcie3a: pcie@1c10000 {
reg-names = "parf", "dbi", "elbi", "atu", "config";
#address-cells = <3>;
#size-cells = <2>;
- ranges = <0x01000000 0x0 0x34200000 0x0 0x34200000 0x0 0x100000>,
+ ranges = <0x01000000 0x0 0x00000000 0x0 0x34200000 0x0 0x100000>,
<0x02000000 0x0 0x34300000 0x0 0x34300000 0x0 0x1d00000>;
bus-range = <0x00 0xff>;
@@ -1953,7 +1953,7 @@ pcie2b: pcie@1c18000 {
reg-names = "parf", "dbi", "elbi", "atu", "config";
#address-cells = <3>;
#size-cells = <2>;
- ranges = <0x01000000 0x0 0x38200000 0x0 0x38200000 0x0 0x100000>,
+ ranges = <0x01000000 0x0 0x00000000 0x0 0x38200000 0x0 0x100000>,
<0x02000000 0x0 0x38300000 0x0 0x38300000 0x0 0x1d00000>;
bus-range = <0x00 0xff>;
@@ -2050,7 +2050,7 @@ pcie2a: pcie@1c20000 {
reg-names = "parf", "dbi", "elbi", "atu", "config";
#address-cells = <3>;
#size-cells = <2>;
- ranges = <0x01000000 0x0 0x3c200000 0x0 0x3c200000 0x0 0x100000>,
+ ranges = <0x01000000 0x0 0x00000000 0x0 0x3c200000 0x0 0x100000>,
<0x02000000 0x0 0x3c300000 0x0 0x3c300000 0x0 0x1d00000>;
bus-range = <0x00 0xff>;
--
2.25.1
next prev parent reply other threads:[~2023-02-28 16:49 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-28 16:47 [PATCH 00/16] Qcom: Fix PCI I/O range defined in devicetree Manivannan Sadhasivam
2023-02-28 16:47 ` [PATCH 01/16] arm64: dts: qcom: sdm845: Fix the PCI I/O port range Manivannan Sadhasivam
2023-02-28 16:55 ` Arnd Bergmann
2023-02-28 16:47 ` [PATCH 02/16] arm64: dts: qcom: msm8998: " Manivannan Sadhasivam
2023-02-28 16:47 ` [PATCH 03/16] arm64: dts: qcom: sc7280: " Manivannan Sadhasivam
2023-02-28 16:47 ` [PATCH 04/16] arm64: dts: qcom: sm8550: " Manivannan Sadhasivam
2023-02-28 16:47 ` [PATCH 05/16] arm64: dts: qcom: ipq8074: " Manivannan Sadhasivam
2023-02-28 16:47 ` [PATCH 06/16] arm64: dts: qcom: ipq6018: " Manivannan Sadhasivam
2023-02-28 16:47 ` [PATCH 07/16] arm64: dts: qcom: msm8996: " Manivannan Sadhasivam
2023-02-28 16:47 ` [PATCH 08/16] arm64: dts: qcom: sm8250: " Manivannan Sadhasivam
2023-02-28 16:47 ` [PATCH 09/16] arm64: dts: qcom: qcs404: Use 0x prefix for the PCI I/O and MEM ranges Manivannan Sadhasivam
2023-02-28 16:47 ` Manivannan Sadhasivam [this message]
2023-02-28 16:47 ` [PATCH 11/16] arm64: dts: qcom: sm8150: Fix the PCI I/O port range Manivannan Sadhasivam
2023-02-28 16:47 ` [PATCH 12/16] arm64: dts: qcom: sm8450: " Manivannan Sadhasivam
2023-02-28 16:47 ` [PATCH 13/16] arm64: dts: qcom: sm8350: " Manivannan Sadhasivam
2023-02-28 16:47 ` [PATCH 14/16] ARM: dts: qcom: apq8064: Use 0x prefix for the PCI I/O and MEM ranges Manivannan Sadhasivam
2023-02-28 16:47 ` [PATCH 15/16] ARM: dts: qcom: ipq4019: Fix the PCI I/O port range Manivannan Sadhasivam
2023-02-28 16:47 ` [PATCH 16/16] ARM: dts: qcom: ipq8064: " Manivannan Sadhasivam
2023-02-28 16:58 ` [PATCH 00/16] Qcom: Fix PCI I/O range defined in devicetree Arnd Bergmann
2023-03-01 11:29 ` Manivannan Sadhasivam
2023-03-01 11:57 ` Arnd Bergmann
2023-02-28 17:29 ` Andrew Halaney
2023-03-01 11:32 ` Manivannan Sadhasivam
2023-03-16 3:20 ` (subset) " Bjorn Andersson
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