From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2AE71C7EE43 for ; Wed, 1 Mar 2023 16:35:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229963AbjCAQfS (ORCPT ); Wed, 1 Mar 2023 11:35:18 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50538 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230042AbjCAQeo (ORCPT ); Wed, 1 Mar 2023 11:34:44 -0500 Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9E32C4741E; Wed, 1 Mar 2023 08:33:58 -0800 (PST) Received: from tr.lan (ip-86-49-120-218.bb.vodafone.cz [86.49.120.218]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: marex@denx.de) by phobos.denx.de (Postfix) with ESMTPSA id 9F71B80AE5; Wed, 1 Mar 2023 17:33:07 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1677688388; bh=6kCuwUfxuT8CRN0hHIyxXlK4ZNkmCusoJml8YpXRQ78=; h=From:To:Cc:Subject:Date:From; b=jnKlunVVpX7znjifAgfnJ7MZjl6CnLLj7zDyYR5+TT9vpCGyCAtMbPCZehg0Edv2M dy6XOdqwP6HC7MsLMNcdTskYZ+VbcDGIlurYzDTnprVS/Y8sX5+EFQg2IN5fFgcwlf 3mCNKTbYVZylW5HvnBp9qBygTrDdGgGnpQ068uuL6o+upC1p/sPYTbB7NCNIhRJngJ r5hvcAixrQqCM23wcnO3UN1BLPtzqBW9edri4Zn8GO+yVpXKWti9XslbzL3Afga6Wa IIhYA4YTv6PQrzaN/VyyTkcl1Fy4sxDL4mauIe1+jsuJ84BGpMN5j+vvC9y9nZ8frM L8uWjCC5BDkIg== From: Marek Vasut To: linux-clk@vger.kernel.org Cc: Marek Vasut , Peng Fan , Fabio Estevam , Adam Ford , Alexander Stein , Abel Vesa , Jacky Bai , Krzysztof Kozlowski , Laurent Pinchart , Luca Ceresoli , Lucas Stach , Marco Felsch , Michael Turquette , NXP Linux Team , Pengutronix Kernel Team , Richard Cochran , Rob Herring , Sascha Hauer , Shawn Guo , Stephen Boyd , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v7 1/5] clk: Introduce devm_clk_hw_register_gate_parent_data() Date: Wed, 1 Mar 2023 17:32:53 +0100 Message-Id: <20230301163257.49005-1-marex@denx.de> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add an API for clock gate that uses parent_data for the parent instead of a string parent_name. Reviewed-by: Peng Fan Reviewed-by: Fabio Estevam Tested-by: Adam Ford #imx8mp-beacon-kit Tested-by: Alexander Stein Signed-off-by: Marek Vasut --- Cc: Abel Vesa Cc: Alexander Stein Cc: Fabio Estevam Cc: Jacky Bai Cc: Krzysztof Kozlowski Cc: Laurent Pinchart Cc: Luca Ceresoli Cc: Lucas Stach Cc: Marco Felsch Cc: Michael Turquette Cc: NXP Linux Team Cc: Peng Fan Cc: Pengutronix Kernel Team Cc: Richard Cochran Cc: Rob Herring Cc: Sascha Hauer Cc: Shawn Guo Cc: Stephen Boyd Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-clk@vger.kernel.org --- V3: New patch V4: - Rebase on next 20230223 V5: Add TB from Adam and Alexander V6: Add RB from Fabio V7: Add RB from Peng --- include/linux/clk-provider.h | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index 842e72a5348fa..92b7c794c6272 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -608,6 +608,25 @@ struct clk *clk_register_gate(struct device *dev, const char *name, __devm_clk_hw_register_gate((dev), NULL, (name), (parent_name), NULL, \ NULL, (flags), (reg), (bit_idx), \ (clk_gate_flags), (lock)) + +/** + * devm_clk_hw_register_gate - register a gate clock with the clock framework + * @dev: device that is registering this clock + * @name: name of this clock + * @parent_data: parent clk data + * @flags: framework-specific flags for this clock + * @reg: register address to control gating of this clock + * @bit_idx: which bit in the register controls gating of this clock + * @clk_gate_flags: gate-specific flags for this clock + * @lock: shared register lock for this clock + */ +#define devm_clk_hw_register_gate_parent_data(dev, name, parent_data, flags, \ + reg, bit_idx, clk_gate_flags, \ + lock) \ + __devm_clk_hw_register_gate((dev), NULL, (name), NULL, NULL, \ + (parent_data), (flags), (reg), (bit_idx), \ + (clk_gate_flags), (lock)) + void clk_unregister_gate(struct clk *clk); void clk_hw_unregister_gate(struct clk_hw *hw); int clk_gate_is_enabled(struct clk_hw *hw); -- 2.39.2