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From: Brad Larson <blarson@amd.com>
To: <fancer.lancer@gmail.com>
Cc: <adrian.hunter@intel.com>, <alcooperx@gmail.com>,
	<andy.shevchenko@gmail.com>, <arnd@arndb.de>, <blarson@amd.com>,
	<brendan.higgins@linux.dev>, <briannorris@chromium.org>,
	<brijeshkumar.singh@amd.com>, <broonie@kernel.org>,
	<catalin.marinas@arm.com>, <davidgow@google.com>,
	<devicetree@vger.kernel.org>, <gerg@linux-m68k.org>,
	<gsomlo@gmail.com>, <krzk@kernel.org>,
	<krzysztof.kozlowski+dt@linaro.org>, <lee.jones@linaro.org>,
	<lee@kernel.org>, <linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <linux-mmc@vger.kernel.org>,
	<linux-spi@vger.kernel.org>, <p.yadav@ti.com>,
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	<rdunlap@infradead.org>, <robh+dt@kernel.org>,
	<samuel@sholland.org>, <skhan@linuxfoundation.org>,
	<suravee.suthikulpanit@amd.com>, <thomas.lendacky@amd.com>,
	<tonyhuang.sunplus@gmail.com>, <ulf.hansson@linaro.org>,
	<vaishnav.a@ti.com>, <will@kernel.org>,
	<yamada.masahiro@socionext.com>
Subject: Re: [PATCH v10 10/15] spi: dw: Add support for AMD Pensando Elba SoC
Date: Mon, 6 Mar 2023 18:20:02 -0800	[thread overview]
Message-ID: <20230307022002.28874-1-blarson@amd.com> (raw)
In-Reply-To: <20230306160017.ptd3ogundxvus5zm@mobilestation>

On Mon, Mar 06, 2023 at 16:00, Serge Semin wrote:
> On Sun, Mar 05, 2023 at 08:07:34PM -0800, Brad Larson wrote:
>> The AMD Pensando Elba SoC includes a DW apb_ssi v4 controller
>> with device specific chip-select control.  The Elba SoC
>> provides four chip-selects where the native DW IP supports
>> two chip-selects.  The Elba DW_SPI instance has two native
>> CS signals that are always overridden.
>> 
>> Signed-off-by: Brad Larson <blarson@amd.com>
>> ---
>> 
>> v10 changes:
>> - Delete struct dw_spi_elba, use regmap directly in priv
>> 
>> v9 changes:
>> - Add use of macros GENMASK() and BIT()
>> - Change ELBA_SPICS_SHIFT() to ELBA_SPICS_OFFSET()
>> 
>> ---
>>  drivers/spi/spi-dw-mmio.c | 65 +++++++++++++++++++++++++++++++++++++++
>>  1 file changed, 65 insertions(+)
>> 
>> diff --git a/drivers/spi/spi-dw-mmio.c b/drivers/spi/spi-dw-mmio.c
>> index 26c40ea6dd12..2076cb83a11b 100644
>> --- a/drivers/spi/spi-dw-mmio.c
>> +++ b/drivers/spi/spi-dw-mmio.c
>> @@ -53,6 +53,20 @@ struct dw_spi_mscc {
>>  	void __iomem        *spi_mst; /* Not sparx5 */
>>  };
>>  
>> +/*
>> + * Elba SoC does not use ssi, pin override is used for cs 0,1 and
>> + * gpios for cs 2,3 as defined in the device tree.
>> + *
>> + * cs:  |       1               0
>> + * bit: |---3-------2-------1-------0
>> + *      |  cs1   cs1_ovr   cs0   cs0_ovr
>> + */
>> +#define ELBA_SPICS_REG			0x2468
>> +#define ELBA_SPICS_OFFSET(cs)		((cs) << 1)
>> +#define ELBA_SPICS_MASK(cs)		(GENMASK(1, 0) << ELBA_SPICS_OFFSET(cs))
>> +#define ELBA_SPICS_SET(cs, val)		\
>> +		((((val) << 1) | BIT(0)) << ELBA_SPICS_OFFSET(cs))
>> +
>>  /*
>>   * The Designware SPI controller (referred to as master in the documentation)
>>   * automatically deasserts chip select when the tx fifo is empty. The chip
>> @@ -237,6 +251,56 @@ static int dw_spi_canaan_k210_init(struct platform_device *pdev,
>>  	return 0;
>>  }
>>  
>> +static void dw_spi_elba_override_cs(struct regmap *syscon, int cs, int enable)
>> +{
>> +	regmap_update_bits(syscon, ELBA_SPICS_REG, ELBA_SPICS_MASK(cs),
>> +			   ELBA_SPICS_SET(cs, enable));
>> +}
>> +
>> +static void dw_spi_elba_set_cs(struct spi_device *spi, bool enable)
>> +{
>> +	struct dw_spi *dws = spi_master_get_devdata(spi->master);
>> +	struct dw_spi_mmio *dwsmmio = container_of(dws, struct dw_spi_mmio, dws);
>> +	struct regmap *syscon = dwsmmio->priv;
>> +	u8 cs;
>> +
>> +	cs = spi->chip_select;
>> +	if (cs < 2)
>> +		dw_spi_elba_override_cs(syscon, spi->chip_select, enable);
>> +
>> +	/*
>> +	 * The DW SPI controller needs a native CS bit selected to start
>> +	 * the serial engine.
>> +	 */
>> +	spi->chip_select = 0;
>> +	dw_spi_set_cs(spi, enable);
>> +	spi->chip_select = cs;
>> +}
>> +
>> +static int dw_spi_elba_init(struct platform_device *pdev,
>> +			    struct dw_spi_mmio *dwsmmio)
>> +{
>> +	const char *syscon_name = "amd,pensando-elba-syscon";
>
>> +	struct device_node *np = pdev->dev.of_node;
>
> Drop this since it's used only once below. 
>

Removed

>> +	struct device_node *node;                                         

Renamed *node to *np

>> +	struct regmap *syscon;                                            
>> +                                                                       
>> -	node = of_parse_phandle(np, syscon_name, 0);                      
>
>	node = of_parse_phandle(dev_of_node(pdev->dev), syscon_name, 0);
>
> +	if (!node)
>
>> +		return dev_err_probe(&pdev->dev, -ENODEV, "failed to find %s\n",
>> +				     syscon_name);
>
> Hm, using dev_err_probe() with known error value seems overkill.

Changed to: return -ENODEV

>> +
>
>> +	syscon = syscon_node_to_regmap(node);
>> +	if (IS_ERR(syscon))
>> +		return dev_err_probe(&pdev->dev, PTR_ERR(syscon),
>> +				     "syscon regmap lookup failed\n");
>
> of_node_put() is missing in the error and success paths.

Result of the above changes are:

+       const char *syscon_name = "amd,pensando-elba-syscon";
+       struct device_node *np;
+       struct regmap *syscon;
+
+       np = of_parse_phandle(pdev->dev.of_node, syscon_name, 0);
+       if (!np)
+               return -ENODEV;
+
+       syscon = syscon_node_to_regmap(np);
+       of_node_put(np);
+       if (IS_ERR(syscon))
+               return dev_err_probe(&pdev->dev, PTR_ERR(syscon),
+                                    "syscon regmap lookup failed\n");

Regards,
Brad

  parent reply	other threads:[~2023-03-07  2:21 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-06  4:07 [PATCH v10 00/15] Support AMD Pensando Elba SoC Brad Larson
2023-03-06  4:07 ` [PATCH v10 01/15] dt-bindings: arm: add AMD Pensando boards Brad Larson
2023-03-06  4:07 ` [PATCH v10 02/15] dt-bindings: mmc: cdns: Add AMD Pensando Elba SoC Brad Larson
2023-03-06  8:28   ` Krzysztof Kozlowski
2023-03-07  2:11     ` Brad Larson
2023-03-06  4:07 ` [PATCH v10 03/15] dt-bindings: spi: cdns: Add compatible for " Brad Larson
2023-03-06  8:29   ` Krzysztof Kozlowski
2023-03-07  2:13     ` Brad Larson
2023-03-06  4:07 ` [PATCH v10 04/15] dt-bindings: spi: dw: Add AMD Pensando Elba SoC SPI Controller Brad Larson
2023-03-06  8:31   ` Krzysztof Kozlowski
2023-03-06 15:36   ` Serge Semin
2023-03-06  4:07 ` [PATCH v10 05/15] dt-bindings: soc: amd: amd,pensando-elbasr: Add AMD Pensando SoC System Controller Brad Larson
2023-03-06  8:35   ` Krzysztof Kozlowski
2023-03-06  8:36     ` Krzysztof Kozlowski
2023-03-07  2:18       ` Brad Larson
2023-03-09  8:46         ` Krzysztof Kozlowski
2023-03-11 23:32           ` Brad Larson
2023-03-07  2:16     ` Brad Larson
2023-03-06  4:07 ` [PATCH v10 06/15] MAINTAINERS: Add entry for AMD PENSANDO Brad Larson
2023-03-06  4:07 ` [PATCH v10 07/15] arm64: Add config for AMD Pensando SoC platforms Brad Larson
2023-03-06  4:07 ` [PATCH v10 08/15] arm64: dts: Add AMD Pensando Elba SoC support Brad Larson
2023-03-06  4:07 ` [PATCH v10 09/15] spi: cadence-quadspi: Add compatible for AMD Pensando Elba SoC Brad Larson
2023-03-06  4:07 ` [PATCH v10 10/15] spi: dw: Add support " Brad Larson
2023-03-06 16:00   ` Serge Semin
2023-03-06 19:59     ` Andy Shevchenko
2023-03-06 20:40       ` Serge Semin
2023-03-07  2:20     ` Brad Larson [this message]
2023-03-09 12:14       ` Serge Semin
2023-03-06  4:07 ` [PATCH v10 11/15] mmc: sdhci-cadence: Enable device specific override of writel() Brad Larson
2023-03-10 11:09   ` Adrian Hunter
2023-03-06  4:07 ` [PATCH v10 12/15] mmc: sdhci-cadence: Support device specific init during probe Brad Larson
2023-03-10 11:10   ` Adrian Hunter
2023-03-06  4:07 ` [PATCH v10 13/15] mmc: sdhci-cadence: Add AMD Pensando Elba SoC support Brad Larson
2023-03-10 11:10   ` Adrian Hunter
2023-03-06  4:07 ` [PATCH v10 14/15] mmc: sdhci-cadence: Support mmc hardware reset Brad Larson
2023-03-10 11:11   ` Adrian Hunter
2023-03-06  4:07 ` [PATCH v10 15/15] soc: amd: Add support for AMD Pensando SoC Controller Brad Larson

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