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From: Bartosz Golaszewski <brgl@bgdev.pl>
To: Andy Gross <agross@kernel.org>,
	Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konrad.dybcio@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Subject: [PATCH v5 5/9] arm64: dts: qcom: sa8775p: add the spi16 node
Date: Thu,  9 Mar 2023 11:37:48 +0100	[thread overview]
Message-ID: <20230309103752.173541-6-brgl@bgdev.pl> (raw)
In-Reply-To: <20230309103752.173541-1-brgl@bgdev.pl>

From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>

Add the SPI controller node for the interface exposed on the sa8775p-ride
development board.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
 arch/arm64/boot/dts/qcom/sa8775p.dtsi | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
index e7ed309fc04f..d1b2a6d30eae 100644
--- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
@@ -504,6 +504,27 @@ qupv3_id_2: geniqup@8c0000 {
 			#size-cells = <2>;
 			status = "disabled";
 
+			spi16: spi@888000 {
+				compatible = "qcom,geni-spi";
+				reg = <0x0 0x00888000 0x0 0x4000>;
+				interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&gcc GCC_QUPV3_WRAP2_S2_CLK>;
+				clock-names = "se";
+				interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS
+						 &clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS>,
+						<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
+						 &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>,
+						<&aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS
+						 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
+				interconnect-names = "qup-core",
+						     "qup-config",
+						     "qup-memory";
+				power-domains = <&rpmhpd SA8775P_CX>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
+
 			i2c18: i2c@890000 {
 				compatible = "qcom,geni-i2c";
 				reg = <0x0 0x00890000 0x0 0x4000>;
-- 
2.37.2


  parent reply	other threads:[~2023-03-09 10:38 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-09 10:37 [PATCH v5 0/9] arm64: dts: qcom: sa8775p-ride: enable relevant QUPv3 IPs Bartosz Golaszewski
2023-03-09 10:37 ` [PATCH v5 1/9] arm64: dts: qcom: sa8775p: add the QUPv3 #2 node Bartosz Golaszewski
2023-03-09 10:37 ` [PATCH v5 2/9] arm64: dts: qcom: sa8775p-ride: enable QUPv3 #2 Bartosz Golaszewski
2023-03-09 10:37 ` [PATCH v5 3/9] arm64: dts: qcom: sa8775p: add the i2c18 node Bartosz Golaszewski
2023-03-09 10:37 ` [PATCH v5 4/9] arm64: dts: qcom: sa8775p-ride: enable i2c18 Bartosz Golaszewski
2023-03-09 10:37 ` Bartosz Golaszewski [this message]
2023-03-09 10:37 ` [PATCH v5 6/9] arm64: dts: qcom: sa8775p-ride: enable the SPI node Bartosz Golaszewski
2023-03-09 10:37 ` [PATCH v5 7/9] arm64: dts: qcom: sa8775p: add high-speed UART nodes Bartosz Golaszewski
2023-03-09 10:37 ` [PATCH v5 8/9] arm64: dts: qcom: sa8775p-ride: enable the GNSS UART port Bartosz Golaszewski
2023-03-09 10:37 ` [PATCH v5 9/9] arm64: dts: qcom: sa8775p-ride: enable the BT " Bartosz Golaszewski
2023-03-16 14:48 ` [PATCH v5 0/9] arm64: dts: qcom: sa8775p-ride: enable relevant QUPv3 IPs Bartosz Golaszewski
2023-03-22 14:45 ` Bjorn Andersson

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