[PATCH 03/14] arm64: dts: qcom: sa8775p: add the spmi node

[Bartosz Golaszewski <brgl@bgdev.pl>]

From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>

Add the SPMI PMIC Arbiter node for SA8775p platforms.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
---
 arch/arm64/boot/dts/qcom/sa8775p.dtsi | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
index 428d9e0849b8..22c98ebc4c46 100644
--- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
@@ -943,6 +943,24 @@ apps_smmu: iommu@15000000 {
 		};
 	};
 
+	spmi_bus: spmi@c440000 {
+		compatible = "qcom,spmi-pmic-arb";
+		reg = <0x0 0x0c440000 0x0 0x1100>,
+		      <0x0 0x0c600000 0x0 0x2000000>,
+		      <0x0 0x0e600000 0x0 0x100000>,
+		      <0x0 0x0e700000 0x0 0xa0000>,
+		      <0x0 0x0c40a000 0x0 0x26000>;
+		reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
+		qcom,channel = <0>;
+		qcom,ee = <0>;
+		interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "periph_irq";
+		interrupt-controller;
+		#interrupt-cells = <4>;
+		#address-cells = <2>;
+		#size-cells = <0>;
+	};
+
 	arch_timer: timer {
 		compatible = "arm,armv8-timer";
 		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
-- 
2.37.2