From: kernel test robot <lkp@intel.com>
To: Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>,
linux-edac@vger.kernel.org
Cc: oe-kbuild-all@lists.linux.dev, git@amd.com,
devicetree@vger.kernel.org, bp@alien8.de,
krzysztof.kozlowski@linaro.org, mchehab@kernel.org,
tony.luck@intel.com, james.morse@arm.com, rric@kernel.org,
michal.simek@xilinx.com
Subject: Re: [PATCH v4 2/2] edac/xilinx: Add EDAC support for Xilinx DDR controller
Date: Sat, 18 Mar 2023 09:48:14 +0800 [thread overview]
Message-ID: <202303180902.boahuY9A-lkp@intel.com> (raw)
In-Reply-To: <20230317140425.16827-3-shubhrajyoti.datta@amd.com>
Hi Shubhrajyoti,
I love your patch! Yet something to improve:
[auto build test ERROR on v6.2]
[cannot apply to ras/edac-for-next linus/master v6.3-rc2 v6.3-rc1 next-20230317]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Shubhrajyoti-Datta/dt-bindings-edac-Add-support-for-Xilinx-Versal-EDAC-DDRMC/20230317-220620
patch link: https://lore.kernel.org/r/20230317140425.16827-3-shubhrajyoti.datta%40amd.com
patch subject: [PATCH v4 2/2] edac/xilinx: Add EDAC support for Xilinx DDR controller
config: powerpc-allmodconfig (https://download.01.org/0day-ci/archive/20230318/202303180902.boahuY9A-lkp@intel.com/config)
compiler: powerpc-linux-gcc (GCC) 12.1.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/intel-lab-lkp/linux/commit/e559cd43b0a69ecf03e6f571f85953dbf8186549
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Shubhrajyoti-Datta/dt-bindings-edac-Add-support-for-Xilinx-Versal-EDAC-DDRMC/20230317-220620
git checkout e559cd43b0a69ecf03e6f571f85953dbf8186549
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=powerpc olddefconfig
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=powerpc SHELL=/bin/bash drivers/edac/
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
| Link: https://lore.kernel.org/oe-kbuild-all/202303180902.boahuY9A-lkp@intel.com/
All errors (new ones prefixed by >>):
In file included from <command-line>:
drivers/edac/versal_edac.c: In function 'setup_column_address_map':
>> drivers/edac/versal_edac.c:852:38: error: 'COL_0_MASK' undeclared (first use in this function); did you mean 'CH_0_MASK'?
852 | priv->col_bit[0] = FIELD_GET(COL_0_MASK, regval);
| ^~~~~~~~~~
include/linux/compiler_types.h:338:23: note: in definition of macro '__compiletime_assert'
338 | if (!(condition)) \
| ^~~~~~~~~
include/linux/compiler_types.h:358:9: note: in expansion of macro '_compiletime_assert'
358 | _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
| ^~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:39:37: note: in expansion of macro 'compiletime_assert'
39 | #define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
| ^~~~~~~~~~~~~~~~~~
include/linux/bitfield.h:65:17: note: in expansion of macro 'BUILD_BUG_ON_MSG'
65 | BUILD_BUG_ON_MSG(!__builtin_constant_p(_mask), \
| ^~~~~~~~~~~~~~~~
include/linux/bitfield.h:128:17: note: in expansion of macro '__BF_FIELD_CHECK'
128 | __BF_FIELD_CHECK(_mask, _reg, 0U, "FIELD_GET: "); \
| ^~~~~~~~~~~~~~~~
drivers/edac/versal_edac.c:852:28: note: in expansion of macro 'FIELD_GET'
852 | priv->col_bit[0] = FIELD_GET(COL_0_MASK, regval);
| ^~~~~~~~~
drivers/edac/versal_edac.c:852:38: note: each undeclared identifier is reported only once for each function it appears in
852 | priv->col_bit[0] = FIELD_GET(COL_0_MASK, regval);
| ^~~~~~~~~~
include/linux/compiler_types.h:338:23: note: in definition of macro '__compiletime_assert'
338 | if (!(condition)) \
| ^~~~~~~~~
include/linux/compiler_types.h:358:9: note: in expansion of macro '_compiletime_assert'
358 | _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
| ^~~~~~~~~~~~~~~~~~~
include/linux/build_bug.h:39:37: note: in expansion of macro 'compiletime_assert'
39 | #define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
| ^~~~~~~~~~~~~~~~~~
include/linux/bitfield.h:65:17: note: in expansion of macro 'BUILD_BUG_ON_MSG'
65 | BUILD_BUG_ON_MSG(!__builtin_constant_p(_mask), \
| ^~~~~~~~~~~~~~~~
include/linux/bitfield.h:128:17: note: in expansion of macro '__BF_FIELD_CHECK'
128 | __BF_FIELD_CHECK(_mask, _reg, 0U, "FIELD_GET: "); \
| ^~~~~~~~~~~~~~~~
drivers/edac/versal_edac.c:852:28: note: in expansion of macro 'FIELD_GET'
852 | priv->col_bit[0] = FIELD_GET(COL_0_MASK, regval);
| ^~~~~~~~~
vim +852 drivers/edac/versal_edac.c
845
846 static void setup_column_address_map(struct edac_priv *priv)
847 {
848 u32 regval;
849 union edac_info cols;
850
851 regval = readl(priv->ddrmc_noc_baseaddr + XDDR_NOC_REG_ADEC8_OFFSET);
> 852 priv->col_bit[0] = FIELD_GET(COL_0_MASK, regval);
853
854 regval = readl(priv->ddrmc_noc_baseaddr + XDDR_NOC_REG_ADEC9_OFFSET);
855 cols.i = regval;
856 priv->col_bit[1] = cols.col1;
857 priv->col_bit[2] = cols.col2;
858 priv->col_bit[3] = cols.col3;
859 priv->col_bit[4] = cols.col4;
860 priv->col_bit[5] = cols.col5;
861
862 regval = readl(priv->ddrmc_noc_baseaddr + XDDR_NOC_REG_ADEC10_OFFSET);
863 cols.i = regval;
864 priv->col_bit[6] = cols.col1;
865 priv->col_bit[7] = cols.col2;
866 priv->col_bit[8] = cols.col3;
867 priv->col_bit[9] = cols.col4;
868 }
869
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests
prev parent reply other threads:[~2023-03-18 1:48 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-17 14:04 [PATCH v4 0/2] edac: xilinx: Added EDAC support for Xilinx DDR controller Shubhrajyoti Datta
2023-03-17 14:04 ` [PATCH v4 1/2] dt-bindings: edac: Add support for Xilinx Versal EDAC DDRMC Shubhrajyoti Datta
2023-03-17 14:04 ` [PATCH v4 2/2] edac/xilinx: Add EDAC support for Xilinx DDR controller Shubhrajyoti Datta
2023-03-18 1:48 ` kernel test robot [this message]
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