From: Andrew Jones <ajones@ventanamicro.com>
To: Alexandre Ghiti <alexghiti@rivosinc.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Rob Herring <robh+dt@kernel.org>,
Frank Rowand <frowand.list@gmail.com>,
Anup Patel <anup@brainfault.org>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, Rob Herring <robh@kernel.org>
Subject: Re: [PATCH v9 3/3] riscv: Use PUD/P4D/PGD pages for the linear mapping
Date: Mon, 27 Mar 2023 13:37:50 +0200 [thread overview]
Message-ID: <20230327113750.4dahiicpcg3b27mz@orel> (raw)
In-Reply-To: <20230324155421.271544-4-alexghiti@rivosinc.com>
On Fri, Mar 24, 2023 at 04:54:21PM +0100, Alexandre Ghiti wrote:
> During the early page table creation, we used to set the mapping for
> PAGE_OFFSET to the kernel load address: but the kernel load address is
> always offseted by PMD_SIZE which makes it impossible to use PUD/P4D/PGD
> pages as this physical address is not aligned on PUD/P4D/PGD size (whereas
> PAGE_OFFSET is).
>
> But actually we don't have to establish this mapping (ie set va_pa_offset)
> that early in the boot process because:
>
> - first, setup_vm installs a temporary kernel mapping and among other
> things, discovers the system memory,
> - then, setup_vm_final creates the final kernel mapping and takes
> advantage of the discovered system memory to create the linear
> mapping.
>
> During the first phase, we don't know the start of the system memory and
> then until the second phase is finished, we can't use the linear mapping at
> all and phys_to_virt/virt_to_phys translations must not be used because it
> would result in a different translation from the 'real' one once the final
> mapping is installed.
>
> So here we simply delay the initialization of va_pa_offset to after the
> system memory discovery. But to make sure noone uses the linear mapping
> before, we add some guard in the DEBUG_VIRTUAL config.
>
> Finally we can use PUD/P4D/PGD hugepages when possible, which will result
> in a better TLB utilization.
>
> Note that:
> - this does not apply to rv32 as the kernel mapping lies in the linear
> mapping.
> - we rely on the firmware to protect itself using PMP.
>
> Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
> Acked-by: Rob Herring <robh@kernel.org> # DT bits
> ---
> arch/riscv/include/asm/page.h | 16 ++++++++++
> arch/riscv/mm/init.c | 58 +++++++++++++++++++++++++++++++----
> arch/riscv/mm/physaddr.c | 16 ++++++++++
> drivers/of/fdt.c | 11 ++++---
> 4 files changed, 90 insertions(+), 11 deletions(-)
>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Thanks,
drew
next prev parent reply other threads:[~2023-03-27 11:37 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-24 15:54 [PATCH v9 0/3] riscv: Use PUD/P4D/PGD pages for the linear mapping Alexandre Ghiti
2023-03-24 15:54 ` [PATCH v9 1/3] riscv: Get rid of riscv_pfn_base variable Alexandre Ghiti
2023-03-24 15:54 ` [PATCH v9 2/3] riscv: Move the linear mapping creation in its own function Alexandre Ghiti
2023-03-27 9:39 ` Andrew Jones
2023-03-27 12:14 ` Anup Patel
2023-03-24 15:54 ` [PATCH v9 3/3] riscv: Use PUD/P4D/PGD pages for the linear mapping Alexandre Ghiti
2023-03-27 9:39 ` Andrew Jones
2023-03-27 11:15 ` Alexandre Ghiti
2023-03-27 11:37 ` Andrew Jones
2023-03-27 11:37 ` Andrew Jones [this message]
2023-03-27 12:13 ` Anup Patel
2023-03-27 12:12 ` [PATCH v9 0/3] " Anup Patel
2023-04-19 14:22 ` Palmer Dabbelt
2023-04-19 14:30 ` patchwork-bot+linux-riscv
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