* [PATCH] arm64: dts: rockchip: Add clk_rtc_32k to Anbernic xx3 Devices
@ 2023-03-27 15:35 Chris Morgan
2023-03-27 16:15 ` Krzysztof Kozlowski
2023-03-30 11:44 ` Heiko Stuebner
0 siblings, 2 replies; 3+ messages in thread
From: Chris Morgan @ 2023-03-27 15:35 UTC (permalink / raw)
To: linux-rockchip
Cc: devicetree, jonas, maccraft123mc, heiko, krzysztof.kozlowski+dt,
robh+dt, Chris Morgan
From: Chris Morgan <macromorgan@hotmail.com>
For the Anbernic devices to display properly, we need to specify the
clock frequency of the PLL_VPLL. Adding the parent clock in the
rk356x.dtsi requires us to update our clock definitions to accomplish
this.
Fixes: 64b69474edf3 ("arm64: dts: rockchip: assign rate to clk_rtc_32k on rk356x")
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
---
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353x.dtsi | 6 ++++--
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts | 6 ++++--
2 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353x.dtsi b/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353x.dtsi
index 65a80d1f6d91..9a0e217f069f 100644
--- a/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353x.dtsi
@@ -16,8 +16,10 @@ backlight: backlight {
};
&cru {
- assigned-clocks = <&cru PLL_GPLL>, <&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
- assigned-clock-rates = <1200000000>, <200000000>, <241500000>;
+ assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>,
+ <&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
+ assigned-clock-rates = <32768>, <1200000000>,
+ <200000000>, <241500000>;
};
&gpio_keys_control {
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts b/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts
index b4b2df821cba..c763c7f3b1b3 100644
--- a/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts
@@ -105,8 +105,10 @@ spk_amp: audio-amplifier {
};
&cru {
- assigned-clocks = <&cru PLL_GPLL>, <&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
- assigned-clock-rates = <1200000000>, <200000000>, <500000000>;
+ assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>,
+ <&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
+ assigned-clock-rates = <32768>, <1200000000>,
+ <200000000>, <500000000>;
};
&dsi_dphy0 {
--
2.34.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] arm64: dts: rockchip: Add clk_rtc_32k to Anbernic xx3 Devices
2023-03-27 15:35 [PATCH] arm64: dts: rockchip: Add clk_rtc_32k to Anbernic xx3 Devices Chris Morgan
@ 2023-03-27 16:15 ` Krzysztof Kozlowski
2023-03-30 11:44 ` Heiko Stuebner
1 sibling, 0 replies; 3+ messages in thread
From: Krzysztof Kozlowski @ 2023-03-27 16:15 UTC (permalink / raw)
To: Chris Morgan, linux-rockchip
Cc: devicetree, jonas, maccraft123mc, heiko, krzysztof.kozlowski+dt,
robh+dt, Chris Morgan
On 27/03/2023 17:35, Chris Morgan wrote:
> From: Chris Morgan <macromorgan@hotmail.com>
>
> For the Anbernic devices to display properly, we need to specify the
> clock frequency of the PLL_VPLL. Adding the parent clock in the
> rk356x.dtsi requires us to update our clock definitions to accomplish
> this.
>
> Fixes: 64b69474edf3 ("arm64: dts: rockchip: assign rate to clk_rtc_32k on rk356x")
>
> Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
No line breaks between tags.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] arm64: dts: rockchip: Add clk_rtc_32k to Anbernic xx3 Devices
2023-03-27 15:35 [PATCH] arm64: dts: rockchip: Add clk_rtc_32k to Anbernic xx3 Devices Chris Morgan
2023-03-27 16:15 ` Krzysztof Kozlowski
@ 2023-03-30 11:44 ` Heiko Stuebner
1 sibling, 0 replies; 3+ messages in thread
From: Heiko Stuebner @ 2023-03-30 11:44 UTC (permalink / raw)
To: Chris Morgan, linux-rockchip
Cc: Heiko Stuebner, jonas, krzysztof.kozlowski+dt, Chris Morgan,
robh+dt, devicetree, maccraft123mc
On Mon, 27 Mar 2023 10:35:47 -0500, Chris Morgan wrote:
> From: Chris Morgan <macromorgan@hotmail.com>
>
> For the Anbernic devices to display properly, we need to specify the
> clock frequency of the PLL_VPLL. Adding the parent clock in the
> rk356x.dtsi requires us to update our clock definitions to accomplish
> this.
>
> [...]
Applied, thanks!
[1/1] arm64: dts: rockchip: Add clk_rtc_32k to Anbernic xx3 Devices
commit: 87891399d9883ed823ba58c2be3ac20cc499ad7d
Best regards,
--
Heiko Stuebner <heiko@sntech.de>
^ permalink raw reply [flat|nested] 3+ messages in thread
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2023-03-27 15:35 [PATCH] arm64: dts: rockchip: Add clk_rtc_32k to Anbernic xx3 Devices Chris Morgan
2023-03-27 16:15 ` Krzysztof Kozlowski
2023-03-30 11:44 ` Heiko Stuebner
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