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From: Konrad Dybcio <konrad.dybcio@linaro.org>
To: Andy Gross <agross@kernel.org>,
	Bjorn Andersson <andersson@kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Shawn Guo <shawn.guo@linaro.org>
Cc: Marijn Suijten <marijn.suijten@somainline.org>,
	linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org,
	Konrad Dybcio <konrad.dybcio@linaro.org>
Subject: [PATCH 1/2] dt-bindings: interrupt-controller: mpm: Allow passing reg through phandle
Date: Tue, 28 Mar 2023 12:02:52 +0200	[thread overview]
Message-ID: <20230328-topic-msgram_mpm-v1-1-1b788a5f5a33@linaro.org> (raw)
In-Reply-To: <20230328-topic-msgram_mpm-v1-0-1b788a5f5a33@linaro.org>

Due to the wild nature of the Qualcomm RPM Message RAM, we can't really
use 'reg' to point to the MPM's slice of Message RAM without cutting into
an already-defined RPM MSG RAM node used for GLINK and SMEM.

Document passing the register space as a slice of SRAM through the
qcom,rpm-msg-ram property. This also makes 'reg' no longer required.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
 .../devicetree/bindings/interrupt-controller/qcom,mpm.yaml          | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/interrupt-controller/qcom,mpm.yaml b/Documentation/devicetree/bindings/interrupt-controller/qcom,mpm.yaml
index 509d20c091af..77fe5e0b378f 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/qcom,mpm.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/qcom,mpm.yaml
@@ -30,6 +30,11 @@ properties:
     description:
       Specifies the base address and size of vMPM registers in RPM MSG RAM.
 
+  qcom,rpm-msg-ram:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description:
+      Phandle to the APSS MPM slice of the RPM Message RAM
+
   interrupts:
     maxItems: 1
     description:
@@ -64,7 +69,6 @@ properties:
 
 required:
   - compatible
-  - reg
   - interrupts
   - mboxes
   - interrupt-controller

-- 
2.40.0


  reply	other threads:[~2023-03-28 10:03 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-28 10:02 [PATCH 0/2] Resolve MPM register space situation Konrad Dybcio
2023-03-28 10:02 ` Konrad Dybcio [this message]
2023-03-29  3:41   ` [PATCH 1/2] dt-bindings: interrupt-controller: mpm: Allow passing reg through phandle Shawn Guo
2023-03-29  8:27   ` Krzysztof Kozlowski
2023-03-29 11:18     ` Konrad Dybcio
2023-03-28 10:02 ` [PATCH 2/2] irqchip: irq-qcom-mpm: Support passing a slice of SRAM as reg space Konrad Dybcio
2023-03-29  3:49   ` Shawn Guo
2023-03-29 11:06     ` Konrad Dybcio
2023-03-29 13:28       ` Shawn Guo
2023-03-29 13:30         ` Konrad Dybcio
2023-03-30  1:34           ` Shawn Guo
2023-04-01 12:06             ` Konrad Dybcio
2023-03-30  1:50           ` Shawn Guo
2023-03-30 11:17             ` Konrad Dybcio
2023-03-29  3:34 ` [PATCH 0/2] Resolve MPM register space situation Shawn Guo
2023-03-29  3:58 ` Shawn Guo
2023-03-29 11:18   ` Konrad Dybcio

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