Re: [PATCH v1 1/7] dt-bindings: power: Constrain properties for JH7110 PMU

[Conor Dooley <conor.dooley@microchip.com>]

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On Wed, Apr 12, 2023 at 04:51:16PM +0800, Changhuang Liang wrote:
> 
> 
> On 2023/4/12 16:35, Krzysztof Kozlowski wrote:
> > On 11/04/2023 08:47, Changhuang Liang wrote:
> >> When use "starfive,jh7110-pmu-dphy" compatible, do not need the reg and
> >> interrupts properties.
> [...]
> >>  
> >>  description: |
> >>    StarFive JH7110 SoC includes support for multiple power domains which can be
> >> @@ -17,6 +18,7 @@ properties:
> >>    compatible:
> >>      enum:
> >>        - starfive,jh7110-pmu
> >> +      - starfive,jh7110-pmu-dphy
> > 
> > You do here much more than commit msg says.
> > 
> > Isn'y DPHY a phy? Why is it in power?
> > 
> 
> OK, I will add more description. This is a power framework used to turn on/off 
> DPHY. So it in power, not a phy.

Perhaps tie it less to its role w/ the phy, and more to do with its
location, say "jh7110-aon-pmu"?
There's already "aon"/"sys"/"stg" stuff used in clock-controller and
syscon compatibles etc.

Krzysztof, what do you think of that? (if you remember the whole
discussion we previously had about using those identifiers a few weeks
ago).

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