From: Walker Chen <walker.chen@starfivetech.com>
To: Conor Dooley <conor.dooley@microchip.com>,
Emil Renner Berthing <emil.renner.berthing@canonical.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
"Hal Feng" <hal.feng@starfivetech.com>
Cc: <linux-riscv@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
<devicetree@vger.kernel.org>,
Walker Chen <walker.chen@starfivetech.com>
Subject: [PATCH v1] riscv: dts: starfive: Add PMU controller node
Date: Mon, 17 Apr 2023 11:47:28 +0800 [thread overview]
Message-ID: <20230417034728.2670-1-walker.chen@starfivetech.com> (raw)
Add the pmu controller node for the StarFive JH7110 SoC. The PMU needs
to be used by other modules, e.g. VPU,ISP,etc.
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
---
This patch is based on:
https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/commit/?h=riscv-dt-for-v6.4&id=60bf0a39842eb042bbdc4539285c7e524011fc2d
---
arch/riscv/boot/dts/starfive/jh7110.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index 4c5fdb905da8..30e1f34d5cf8 100644
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -496,5 +496,12 @@
gpio-controller;
#gpio-cells = <2>;
};
+
+ pwrc: power-controller@17030000 {
+ compatible = "starfive,jh7110-pmu";
+ reg = <0x0 0x17030000 0x0 0x10000>;
+ interrupts = <111>;
+ #power-domain-cells = <1>;
+ };
};
};
--
2.17.1
next reply other threads:[~2023-04-17 3:47 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-17 3:47 Walker Chen [this message]
2023-05-07 22:02 ` [PATCH v1] riscv: dts: starfive: Add PMU controller node Conor Dooley
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