From: Rob Herring <robh@kernel.org>
To: Xingyu Wu <xingyu.wu@starfivetech.com>
Cc: William Qiu <william.qiu@starfivetech.com>,
linux-riscv@lists.infradead.org, Conor Dooley <conor@kernel.org>,
Emil Renner Berthing <kernel@esmil.dk>,
Paul Walmsley <paul.walmsley@sifive.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
Hal Feng <hal.feng@starfivetech.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
linux-clk@vger.kernel.org, Stephen Boyd <sboyd@kernel.org>,
linux-kernel@vger.kernel.org,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
devicetree@vger.kernel.org,
Michael Turquette <mturquette@baylibre.com>
Subject: Re: [PATCH v3 5/7] dt-bindings: soc: starfive: Add StarFive syscon module
Date: Mon, 17 Apr 2023 15:36:51 -0500 [thread overview]
Message-ID: <20230417203651.GA3319886-robh@kernel.org> (raw)
In-Reply-To: <8c396a98-a76e-cd68-4d26-15ae3a15a623@starfivetech.com>
On Mon, Apr 17, 2023 at 03:43:48PM +0800, Xingyu Wu wrote:
> On 2023/4/14 20:37, Rob Herring wrote:
> >
> > On Fri, 14 Apr 2023 10:41:55 +0800, Xingyu Wu wrote:
> >> From: William Qiu <william.qiu@starfivetech.com>
> >>
> >> Add documentation to describe StarFive System Controller Registers.
> >>
> >> Signed-off-by: William Qiu <william.qiu@starfivetech.com>
> >> ---
> >> .../soc/starfive/starfive,jh7110-syscon.yaml | 58 +++++++++++++++++++
> >> MAINTAINERS | 6 ++
> >> 2 files changed, 64 insertions(+)
> >> create mode 100644 Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
> >>
> >
> > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
> > on your patch (DT_CHECKER_FLAGS is new in v5.13):
> >
> > yamllint warnings/errors:
> >
> > dtschema/dtc warnings/errors:
> > ./Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml: Unable to find schema file matching $id: http://devicetree.org/schemas/clock/starfive,jh7110-pll.yaml
> >
> > doc reference errors (make refcheckdocs):
> >
> > See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20230414024157.53203-6-xingyu.wu@starfivetech.com
> >
> > The base for the series is generally the latest rc1. A different dependency
> > should be noted in *this* patch.
> >
> > If you already ran 'make dt_binding_check' and didn't see the above
> > error(s), then make sure 'yamllint' is installed and dt-schema is up to
> > date:
> >
> > pip3 install dtschema --upgrade
> >
> > Please check and re-submit after running the above command yourself. Note
> > that DT_SCHEMA_FILES can be set to your schema file to speed up checking
> > your schema. However, it must be unset to test all examples with your schema.
> >
>
> I have updated yamllint and dtschema, and tested it and didn't see this error.
> I asked william and also didn't see this. This error says the file:
> http://devicetree.org/schemas/clock/starfive,jh7110-pll.yaml was not found.
> This file is added in patch 1 but patch 1 should be applied after these patchset
> about JH7110 basic clock drivers. I don't know if that's the reason.
Yes, patch 1 could not be applied[1].
Rob
[1] https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20230414024157.53203-2-xingyu.wu@starfivetech.com/
next prev parent reply other threads:[~2023-04-17 20:37 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-14 2:41 [PATCH v3 0/7] Add PLL clocks driver for StarFive JH7110 SoC Xingyu Wu
2023-04-14 2:41 ` [PATCH v3 1/7] dt-bindings: clock: Add StarFive JH7110 PLL clock generator Xingyu Wu
2023-04-14 2:41 ` [PATCH v3 2/7] clk: starfive: Add StarFive JH7110 PLL clock driver Xingyu Wu
2023-04-14 2:41 ` [PATCH v3 3/7] dt-bindings: clock: jh7110-syscrg: Add PLL clock inputs Xingyu Wu
2023-04-14 2:41 ` [PATCH v3 4/7] clk: starfive: jh7110-sys: Modify PLL clocks source Xingyu Wu
2023-04-14 2:41 ` [PATCH v3 5/7] dt-bindings: soc: starfive: Add StarFive syscon module Xingyu Wu
2023-04-14 12:37 ` Rob Herring
2023-04-17 7:43 ` Xingyu Wu
2023-04-17 20:36 ` Rob Herring [this message]
2023-04-17 20:37 ` Rob Herring
2023-04-24 17:15 ` Conor Dooley
2023-05-08 19:24 ` Conor Dooley
2023-05-09 6:23 ` Xingyu Wu
2023-05-09 6:35 ` Conor Dooley
2023-05-09 6:52 ` Xingyu Wu
2023-05-11 6:59 ` Xingyu Wu
2023-04-14 2:41 ` [PATCH v3 6/7] riscv: dts: starfive: jh7110: Add syscon nodes Xingyu Wu
2023-04-14 2:41 ` [PATCH v3 7/7] riscv: dts: starfive: jh7110: Add PLL clock node and modify syscrg node Xingyu Wu
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