From: Rick Wertenbroek <rick.wertenbroek@gmail.com>
To: alberto.dassatti@heig-vd.ch
Cc: xxm@rock-chips.com, dlemoal@kernel.org, stable@vger.kernel.org,
"Rick Wertenbroek" <rick.wertenbroek@gmail.com>,
"Shawn Lin" <shawn.lin@rock-chips.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Heiko Stuebner" <heiko@sntech.de>,
"Corentin Labbe" <clabbe@baylibre.com>,
"Caleb Connolly" <kc@postmarketos.org>,
"Brian Norris" <briannorris@chromium.org>,
"Johan Jonker" <jbx6244@gmail.com>,
"Judy Hsiao" <judyhsiao@chromium.org>,
"Hugh Cole-Baker" <sigmaris@gmail.com>,
"Arnaud Ferraris" <arnaud.ferraris@collabora.com>,
linux-pci@vger.kernel.org, linux-rockchip@lists.infradead.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v5 11/11] PCI: rockchip: Set address alignment for endpoint mode
Date: Tue, 18 Apr 2023 09:46:58 +0200 [thread overview]
Message-ID: <20230418074700.1083505-12-rick.wertenbroek@gmail.com> (raw)
In-Reply-To: <20230418074700.1083505-1-rick.wertenbroek@gmail.com>
From: Damien Le Moal <dlemoal@kernel.org>
The address translation unit of the rockchip EP controller does not use
the lower 8 bits of a PCIe-space address to map local memory. Thus we
must set the align feature field to 256 to let the user know about this
constraint.
Fixes: cf590b078391 ("PCI: rockchip: Add EP driver for Rockchip PCIe controller")
Cc: stable@vger.kernel.org
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
Signed-off-by: Rick Wertenbroek <rick.wertenbroek@gmail.com>
---
drivers/pci/controller/pcie-rockchip-ep.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pci/controller/pcie-rockchip-ep.c b/drivers/pci/controller/pcie-rockchip-ep.c
index edfced311a9f..0af0e965fb57 100644
--- a/drivers/pci/controller/pcie-rockchip-ep.c
+++ b/drivers/pci/controller/pcie-rockchip-ep.c
@@ -442,6 +442,7 @@ static const struct pci_epc_features rockchip_pcie_epc_features = {
.linkup_notifier = false,
.msi_capable = true,
.msix_capable = false,
+ .align = 256,
};
static const struct pci_epc_features*
--
2.25.1
next prev parent reply other threads:[~2023-04-18 7:49 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-18 7:46 [PATCH v5 00/11] PCI: rockchip: Fix RK3399 PCIe endpoint controller driver Rick Wertenbroek
2023-04-18 7:46 ` [PATCH v5 01/11] PCI: rockchip: Remove writes to unused registers Rick Wertenbroek
2023-04-18 7:46 ` [PATCH v5 02/11] PCI: rockchip: Write PCI Device ID to correct register Rick Wertenbroek
2023-04-18 7:46 ` [PATCH v5 03/11] PCI: rockchip: Assert PCI Configuration Enable bit after probe Rick Wertenbroek
2023-04-18 7:46 ` [PATCH v5 04/11] PCI: rockchip: Add poll and timeout to wait for PHY PLLs to be locked Rick Wertenbroek
2023-04-18 7:46 ` [PATCH v5 05/11] arm64: dts: rockchip: Add dtsi entry for RK3399 PCIe endpoint core Rick Wertenbroek
2023-04-18 7:46 ` [PATCH v5 06/11] dt-bindings: PCI: Update the RK3399 example to a valid one Rick Wertenbroek
2023-04-19 20:01 ` Krzysztof Kozlowski
2023-04-21 9:26 ` Lorenzo Pieralisi
2023-04-21 16:30 ` Krzysztof Kozlowski
2023-04-18 7:46 ` [PATCH v5 07/11] PCI: rockchip: Fix legacy IRQ generation for RK3399 PCIe endpoint core Rick Wertenbroek
2023-04-18 7:46 ` [PATCH v5 08/11] PCI: rockchip: Fix window mapping and address translation for endpoint Rick Wertenbroek
2023-04-18 7:46 ` [PATCH v5 09/11] PCI: rockchip: Use u32 variable to access 32-bit registers Rick Wertenbroek
2023-04-18 7:46 ` [PATCH v5 10/11] PCI: rockchip: Don't advertise MSI-X in PCIe capabilities Rick Wertenbroek
2023-04-18 7:46 ` Rick Wertenbroek [this message]
2023-06-22 7:37 ` (subset) [PATCH v5 00/11] PCI: rockchip: Fix RK3399 PCIe endpoint controller driver Lorenzo Pieralisi
2023-06-26 11:03 ` Heiko Stuebner
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230418074700.1083505-12-rick.wertenbroek@gmail.com \
--to=rick.wertenbroek@gmail.com \
--cc=alberto.dassatti@heig-vd.ch \
--cc=arnaud.ferraris@collabora.com \
--cc=bhelgaas@google.com \
--cc=briannorris@chromium.org \
--cc=clabbe@baylibre.com \
--cc=devicetree@vger.kernel.org \
--cc=dlemoal@kernel.org \
--cc=heiko@sntech.de \
--cc=jbx6244@gmail.com \
--cc=judyhsiao@chromium.org \
--cc=kc@postmarketos.org \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=kw@linux.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=linux-rockchip@lists.infradead.org \
--cc=lpieralisi@kernel.org \
--cc=robh@kernel.org \
--cc=shawn.lin@rock-chips.com \
--cc=sigmaris@gmail.com \
--cc=stable@vger.kernel.org \
--cc=xxm@rock-chips.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).