From: Marc Kleine-Budde <mkl@pengutronix.de>
To: "Mendez, Judith" <jm@ti.com>
Cc: Oliver Hartkopp <socketcan@hartkopp.net>,
Chandrasekar Ramakrishnan <rcsekar@samsung.com>,
Nishanth Menon <nm@ti.com>, Vignesh Raghavendra <vigneshr@ti.com>,
Andrew Davis <afd@ti.com>,
Wolfgang Grandegger <wg@grandegger.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
linux-can@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, netdev@vger.kernel.org,
Schuyler Patton <spatton@ti.com>
Subject: Re: [RFC PATCH 5/5] can: m_can: Add hrtimer to generate software interrupt
Date: Wed, 19 Apr 2023 08:13:52 +0200 [thread overview]
Message-ID: <20230419-trimmer-fasting-928868e8cb81-mkl@pengutronix.de> (raw)
In-Reply-To: <5ece3561-4690-a721-aa83-adf80d0be9f5@ti.com>
[-- Attachment #1: Type: text/plain, Size: 2297 bytes --]
On 18.04.2023 15:59:57, Mendez, Judith wrote:
> > > > > > > The "shortest" 11 bit CAN ID CAN frame is a Classical CAN frame with DLC = 0
> > > > > > > and 1 Mbit/s (arbitration) bitrate. This should be 48 bits @1Mbit => ~50
> > > > > > > usecs
> > > > > > >
> > > > > > > So it should be something about
> > > > > > >
> > > > > > > 50 usecs * (FIFO queue len - 2)
> > > > > >
> > > > > > Where does the "2" come from?
> > > > >
> > > > > I thought about handling the FIFO earlier than it gets completely "full".
> > > > >
> > > > > The fetching routine would need some time too and the hrtimer could also
> > > > > jitter to some extend.
> > > >
> > > > I was assuming something like this.
> > > >
> > > > I would argue that the polling time should be:
> > > >
> > > > 50 µs * FIFO length - IRQ overhead.
> > > >
> > > > The max IRQ overhead depends on your SoC and kernel configuration.
> > >
> > > I just tried an educated guess to prevent the FIFO to be filled up
> > > completely. How can you estimate the "IRQ overhead"? And how do you catch
> > > the CAN frames that are received while the IRQ is handled?
> >
> > We're talking about polling, better call it "overhead" or "latency from
> > timer expiration until FIFO has at least one frame room". This value
> > depends on your system.
> >
> > It depends on many, many factors, SoC, Kernel configuration (preempt RT,
> > powersaving, frequency scaling, system load. In your example it's 100
> > µs. I wanted to say there's an overhead (or latency) and we need enough
> > space in the FIFO, to cover it.
> >
>
> I am not sure how to estimate IRQ overhead, but FIFO length should be 64
> elements.
Ok
> 50 us * 62 is about 3.1 ms and we are using 1 ms timer polling interval.
Sounds good.
> Running a few benchmarks showed that using 0.5 ms timer polling interval
> starts to take a toll on CPU load, that is why I chose 1 ms polling
> interval.
However in the code you use 5 ms.
Marc
--
Pengutronix e.K. | Marc Kleine-Budde |
Embedded Linux | https://www.pengutronix.de |
Vertretung Nürnberg | Phone: +49-5121-206917-129 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-9 |
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next prev parent reply other threads:[~2023-04-19 6:14 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-13 22:30 [RFC PATCH 0/5] Enable multiple MCAN on AM62x Judith Mendez
2023-04-13 22:30 ` [RFC PATCH 1/5] arm64: dts: ti: Add AM62x MCAN MAIN domain transceiver overlay Judith Mendez
2023-04-13 22:30 ` [RFC PATCH 2/5] arm64: defconfig: Enable MCAN driver Judith Mendez
2023-04-13 22:30 ` [RFC PATCH 3/5] dt-binding: can: m_can: Remove required interrupt attributes Judith Mendez
2023-04-14 8:00 ` Krzysztof Kozlowski
2023-04-13 22:30 ` [RFC PATCH 4/5] arm64: dts: ti: Enable multiple MCAN for AM62x in MCU MCAN overlay Judith Mendez
2023-04-14 8:01 ` Krzysztof Kozlowski
2023-04-14 18:29 ` Nishanth Menon
2023-04-14 20:44 ` Krzysztof Kozlowski
2023-04-14 22:11 ` Nishanth Menon
2023-04-19 15:54 ` Mendez, Judith
2023-04-13 22:30 ` [RFC PATCH 5/5] can: m_can: Add hrtimer to generate software interrupt Judith Mendez
2023-04-14 18:20 ` Marc Kleine-Budde
2023-04-16 12:33 ` Oliver Hartkopp
2023-04-16 15:35 ` Marc Kleine-Budde
2023-04-16 19:46 ` Oliver Hartkopp
2023-04-17 7:26 ` Marc Kleine-Budde
2023-04-17 17:34 ` Oliver Hartkopp
2023-04-17 19:26 ` Marc Kleine-Budde
2023-04-18 20:59 ` Mendez, Judith
2023-04-19 6:13 ` Marc Kleine-Budde [this message]
2023-04-19 14:38 ` Mendez, Judith
2023-04-19 19:06 ` Mendez, Judith
2023-04-14 6:12 ` [RFC PATCH 0/5] Enable multiple MCAN on AM62x Vignesh Raghavendra
2023-04-19 15:12 ` Mendez, Judith
2023-04-14 17:49 ` Marc Kleine-Budde
2023-04-18 16:15 ` Mendez, Judith
2023-04-19 6:10 ` Marc Kleine-Budde
2023-04-19 20:40 ` Mendez, Judith
2023-04-20 9:36 ` Marc Kleine-Budde
2023-04-20 15:17 ` Mendez, Judith
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