devicetree.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Manivannan Sadhasivam <mani@kernel.org>
To: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Cc: jingoohan1@gmail.com, gustavo.pimentel@synopsys.com,
	fancer.lancer@gmail.com, lpieralisi@kernel.org,
	robh+dt@kernel.org, kw@linux.com, bhelgaas@google.com,
	kishon@kernel.org, marek.vasut+renesas@gmail.com,
	linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	linux-renesas-soc@vger.kernel.org, Rob Herring <robh@kernel.org>
Subject: Re: [PATCH v13 17/22] dt-bindings: PCI: renesas: Add R-Car Gen4 PCIe Host
Date: Sat, 22 Apr 2023 19:36:44 +0530	[thread overview]
Message-ID: <20230422140644.GN4769@thinkpad> (raw)
In-Reply-To: <20230418122403.3178462-18-yoshihiro.shimoda.uh@renesas.com>

On Tue, Apr 18, 2023 at 09:23:58PM +0900, Yoshihiro Shimoda wrote:
> Document bindings for Renesas R-Car Gen4 and R-Car S4-8 (R8A779F0)
> PCIe host module.
> 
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> Reviewed-by: Rob Herring <robh@kernel.org>
> Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
> ---
>  .../bindings/pci/rcar-gen4-pci-host.yaml      | 109 ++++++++++++++++++
>  1 file changed, 109 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/pci/rcar-gen4-pci-host.yaml
> 
> diff --git a/Documentation/devicetree/bindings/pci/rcar-gen4-pci-host.yaml b/Documentation/devicetree/bindings/pci/rcar-gen4-pci-host.yaml
> new file mode 100644
> index 000000000000..637353c3df8b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pci/rcar-gen4-pci-host.yaml
> @@ -0,0 +1,109 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +# Copyright (C) 2022 Renesas Electronics Corp.
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pci/rcar-gen4-pci-host.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Renesas R-Car Gen4 PCIe Host
> +
> +maintainers:
> +  - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> +
> +allOf:
> +  - $ref: snps,dw-pcie.yaml#
> +
> +properties:
> +  compatible:
> +    items:
> +      - const: renesas,r8a779f0-pcie   # R-Car S4-8
> +      - const: renesas,rcar-gen4-pcie  # R-Car Gen4
> +
> +  reg:
> +    maxItems: 6
> +
> +  reg-names:
> +    items:
> +      - const: dbi
> +      - const: dbi2
> +      - const: atu
> +      - const: dma
> +      - const: app
> +      - const: config
> +
> +  interrupts:
> +    maxItems: 4
> +
> +  interrupt-names:
> +    items:
> +      - const: msi
> +      - const: dma
> +      - const: sft_ce
> +      - const: app
> +
> +  clocks:
> +    maxItems: 1
> +
> +  power-domains:
> +    maxItems: 1
> +
> +  resets:
> +    maxItems: 1
> +
> +  max-link-speed:
> +    maximum: 4
> +
> +  num-lanes:
> +    maximum: 4
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +  - clocks
> +  - power-domains
> +
> +unevaluatedProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/clock/r8a779f0-cpg-mssr.h>
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +    #include <dt-bindings/power/r8a779f0-sysc.h>
> +
> +    soc {
> +        #address-cells = <2>;
> +        #size-cells = <2>;
> +
> +        pcie: pcie@e65d0000 {
> +            compatible = "renesas,r8a779f0-pcie", "renesas,rcar-gen4-pcie";
> +            reg = <0 0xe65d0000 0 0x1000>, <0 0xe65d2000 0 0x0800>,
> +                  <0 0xe65d3000 0 0x2000>, <0 0xe65d5000 0 0x1200>,
> +                  <0 0xe65d6200 0 0x0e00>, <0 0xfe000000 0 0x400000>;
> +            reg-names = "dbi", "dbi2", "atu", "dma", "app", "config";
> +            #address-cells = <3>;
> +            #size-cells = <2>;
> +            bus-range = <0x00 0xff>;
> +            device_type = "pci";
> +            ranges = <0x81000000 0 0x00000000 0 0xfe000000 0 0x00400000
> +                      0x82000000 0 0x30000000 0 0x30000000 0 0x10000000>;

Do you actually need relocatable (0x8) flag?

- Mani

> +            dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
> +            interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
> +                         <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
> +                         <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
> +                         <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>;
> +            interrupt-names = "msi", "dma", "sft_ce", "app";
> +            #interrupt-cells = <1>;
> +            interrupt-map-mask = <0 0 0 7>;
> +            interrupt-map = <0 0 0 1 &gic GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
> +                             0 0 0 2 &gic GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
> +                             0 0 0 3 &gic GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
> +                             0 0 0 4 &gic GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>;
> +            clocks = <&cpg CPG_MOD 624>;
> +            power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
> +            resets = <&cpg 624>;
> +            num-lanes = <2>;
> +            snps,enable-cdm-check;
> +            max-link-speed = <2>;
> +        };
> +    };
> -- 
> 2.25.1
> 

-- 
மணிவண்ணன் சதாசிவம்

  reply	other threads:[~2023-04-22 14:07 UTC|newest]

Thread overview: 58+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-18 12:23 [PATCH v13 00/22] PCI: rcar-gen4: Add R-Car Gen4 PCIe support Yoshihiro Shimoda
2023-04-18 12:23 ` [PATCH v13 01/22] PCI: Add PCI_EXP_LNKCAP_MLW macros Yoshihiro Shimoda
2023-04-18 12:23 ` [PATCH v13 02/22] PCI: Add PCI_HEADER_TYPE_MULTI_FUNC Yoshihiro Shimoda
2023-04-18 12:23 ` [PATCH v13 03/22] PCI: Add INTx Mechanism Messages macros Yoshihiro Shimoda
2023-04-18 12:23 ` [PATCH v13 04/22] PCI: Rename PCI_EPC_IRQ_LEGACY with PCI_EPC_IRQ_INTX Yoshihiro Shimoda
2023-04-22 10:56   ` Manivannan Sadhasivam
2023-04-24  5:00     ` Yoshihiro Shimoda
2023-04-24  6:44   ` Jesper Nilsson
2023-04-18 12:23 ` [PATCH v13 05/22] PCI: dwc: Rename with dw_pcie_ep_raise_intx_irq() Yoshihiro Shimoda
2023-04-22 11:01   ` Manivannan Sadhasivam
2023-04-24  5:02     ` Yoshihiro Shimoda
2023-04-18 12:23 ` [PATCH v13 06/22] PCI: dwc: Introduce struct dw_pcie_outbound_atu Yoshihiro Shimoda
2023-04-22 11:09   ` Manivannan Sadhasivam
2023-04-22 11:15     ` Manivannan Sadhasivam
2023-04-24  5:23       ` Yoshihiro Shimoda
2023-04-18 12:23 ` [PATCH v13 07/22] PCI: dwc: Add members into " Yoshihiro Shimoda
2023-04-18 12:23 ` [PATCH v13 08/22] PCI: dwc: Change arguments of dw_pcie_prog_ep_outbound_atu() Yoshihiro Shimoda
2023-04-22 11:14   ` Manivannan Sadhasivam
2023-04-24  5:22     ` Yoshihiro Shimoda
2023-04-18 12:23 ` [PATCH v13 09/22] PCI: dwc: Add support for triggering INTx IRQs Yoshihiro Shimoda
2023-04-22 11:39   ` Manivannan Sadhasivam
2023-04-24  5:25     ` Yoshihiro Shimoda
2023-04-18 12:23 ` [PATCH v13 10/22] PCI: dwc: Add dw_pcie_link_set_max_link_width() Yoshihiro Shimoda
2023-04-22 11:45   ` Manivannan Sadhasivam
2023-04-18 12:23 ` [PATCH v13 11/22] PCI: dwc: Add dw_pcie_link_set_max_width() Yoshihiro Shimoda
2023-04-22 11:50   ` Manivannan Sadhasivam
2023-04-24  5:27     ` Yoshihiro Shimoda
2023-04-18 12:23 ` [PATCH v13 12/22] PCI: dwc: Add dw_pcie_link_set_max_cap_width() Yoshihiro Shimoda
2023-04-22 13:49   ` Manivannan Sadhasivam
2023-04-24  5:34     ` Yoshihiro Shimoda
2023-04-18 12:23 ` [PATCH v13 13/22] PCI: dwc: Add EDMA_UNROLL capability flag Yoshihiro Shimoda
2023-04-22 13:56   ` Manivannan Sadhasivam
2023-04-24  6:00     ` Yoshihiro Shimoda
2023-04-18 12:23 ` [PATCH v13 14/22] PCI: dwc: Expose dw_pcie_ep_exit() to module Yoshihiro Shimoda
2023-04-22 13:58   ` Manivannan Sadhasivam
2023-04-24  6:26     ` Yoshihiro Shimoda
2023-04-18 12:23 ` [PATCH v13 15/22] PCI: dwc: Introduce .ep_pre_init() and .ep_deinit() Yoshihiro Shimoda
2023-04-22 14:00   ` Manivannan Sadhasivam
2023-04-24  6:27     ` Yoshihiro Shimoda
2023-04-18 12:23 ` [PATCH v13 16/22] dt-bindings: PCI: dwc: Update maxItems of reg and reg-names Yoshihiro Shimoda
2023-04-21 18:04   ` Rob Herring
2023-04-22 14:02   ` Manivannan Sadhasivam
2023-04-24  6:28     ` Yoshihiro Shimoda
2023-04-18 12:23 ` [PATCH v13 17/22] dt-bindings: PCI: renesas: Add R-Car Gen4 PCIe Host Yoshihiro Shimoda
2023-04-22 14:06   ` Manivannan Sadhasivam [this message]
2023-04-24  8:59     ` Yoshihiro Shimoda
2023-04-18 12:23 ` [PATCH v13 18/22] dt-bindings: PCI: renesas: Add R-Car Gen4 PCIe Endpoint Yoshihiro Shimoda
2023-04-22 14:08   ` Manivannan Sadhasivam
2023-04-18 12:24 ` [PATCH v13 19/22] PCI: rcar-gen4: Add R-Car Gen4 PCIe Host support Yoshihiro Shimoda
2023-04-22 14:38   ` Manivannan Sadhasivam
2023-04-24 10:46     ` Yoshihiro Shimoda
2023-04-18 12:24 ` [PATCH v13 20/22] PCI: rcar-gen4-ep: Add R-Car Gen4 PCIe Endpoint support Yoshihiro Shimoda
2023-04-22 14:47   ` Manivannan Sadhasivam
2023-04-24 11:37     ` Yoshihiro Shimoda
2023-04-18 12:24 ` [PATCH v13 21/22] MAINTAINERS: Update PCI DRIVER FOR RENESAS R-CAR for R-Car Gen4 Yoshihiro Shimoda
2023-04-22 14:49   ` Manivannan Sadhasivam
2023-04-18 12:24 ` [PATCH v13 22/22] misc: pci_endpoint_test: Add Device ID for R-Car S4-8 PCIe controller Yoshihiro Shimoda
2023-04-22 14:51   ` Manivannan Sadhasivam

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20230422140644.GN4769@thinkpad \
    --to=mani@kernel.org \
    --cc=bhelgaas@google.com \
    --cc=devicetree@vger.kernel.org \
    --cc=fancer.lancer@gmail.com \
    --cc=gustavo.pimentel@synopsys.com \
    --cc=jingoohan1@gmail.com \
    --cc=kishon@kernel.org \
    --cc=kw@linux.com \
    --cc=linux-pci@vger.kernel.org \
    --cc=linux-renesas-soc@vger.kernel.org \
    --cc=lpieralisi@kernel.org \
    --cc=marek.vasut+renesas@gmail.com \
    --cc=robh+dt@kernel.org \
    --cc=robh@kernel.org \
    --cc=yoshihiro.shimoda.uh@renesas.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).