* [PATCH 1/2] ARM: dts: BCM5301X: Relicense Rafał's code to the GPL 2.0+ / MIT
@ 2023-05-03 12:16 Rafał Miłecki
2023-05-03 12:16 ` [PATCH 2/2] ARM: dts: BCM5301X: Relicense Florian's " Rafał Miłecki
2023-05-08 18:49 ` [PATCH 1/2] ARM: dts: BCM5301X: Relicense =?iso-8859-2?Q?Rafa=B3's?= " Florian Fainelli
0 siblings, 2 replies; 4+ messages in thread
From: Rafał Miłecki @ 2023-05-03 12:16 UTC (permalink / raw)
To: Florian Fainelli
Cc: Hauke Mehrtens, Rob Herring, Krzysztof Kozlowski,
linux-arm-kernel, devicetree, bcm-kernel-feedback-list,
Rafał Miłecki
From: Rafał Miłecki <rafal@milecki.pl>
All BCM5301X device DTS files use dual licensing. Try the same for SoC.
Introduce a new .dtsi file with a proper SPDX tag.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
MAINTAINERS | 1 +
arch/arm/boot/dts/bcm-ns.dtsi | 202 ++++++++++++++++++++++++++++++++
arch/arm/boot/dts/bcm5301x.dtsi | 192 +-----------------------------
3 files changed, 205 insertions(+), 190 deletions(-)
create mode 100644 arch/arm/boot/dts/bcm-ns.dtsi
diff --git a/MAINTAINERS b/MAINTAINERS
index a81ba8328704..35c2fe651081 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -4001,6 +4001,7 @@ M: Rafał Miłecki <zajec5@gmail.com>
R: Broadcom internal kernel review list <bcm-kernel-feedback-list@broadcom.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
+F: arch/arm/boot/dts/bcm-ns.dtsi
F: arch/arm/boot/dts/bcm470*
F: arch/arm/boot/dts/bcm5301*
F: arch/arm/boot/dts/bcm953012*
diff --git a/arch/arm/boot/dts/bcm-ns.dtsi b/arch/arm/boot/dts/bcm-ns.dtsi
new file mode 100644
index 000000000000..21d672aba75a
--- /dev/null
+++ b/arch/arm/boot/dts/bcm-ns.dtsi
@@ -0,0 +1,202 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include <dt-bindings/clock/bcm-nsp.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ axi@18000000 {
+ compatible = "brcm,bus-axi";
+ reg = <0x18000000 0x1000>;
+ ranges = <0x00000000 0x18000000 0x00100000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ chipcommon: chipcommon@0 {
+ reg = <0x00000000 0x1000>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ pcie0: pcie@12000 {
+ reg = <0x00012000 0x1000>;
+ };
+
+ pcie1: pcie@13000 {
+ reg = <0x00013000 0x1000>;
+ };
+
+ usb2: usb2@21000 {
+ reg = <0x00021000 0x1000>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ interrupt-parent = <&gic>;
+
+ ehci: usb@21000 {
+ #usb-cells = <0>;
+
+ compatible = "generic-ehci";
+ reg = <0x00021000 0x1000>;
+ interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+ phys = <&usb2_phy>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ehci_port1: port@1 {
+ reg = <1>;
+ #trigger-source-cells = <0>;
+ };
+
+ ehci_port2: port@2 {
+ reg = <2>;
+ #trigger-source-cells = <0>;
+ };
+ };
+
+ ohci: usb@22000 {
+ #usb-cells = <0>;
+
+ compatible = "generic-ohci";
+ reg = <0x00022000 0x1000>;
+ interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ohci_port1: port@1 {
+ reg = <1>;
+ #trigger-source-cells = <0>;
+ };
+
+ ohci_port2: port@2 {
+ reg = <2>;
+ #trigger-source-cells = <0>;
+ };
+ };
+ };
+
+ usb3: usb3@23000 {
+ reg = <0x00023000 0x1000>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ interrupt-parent = <&gic>;
+
+ xhci: usb@23000 {
+ #usb-cells = <0>;
+
+ compatible = "generic-xhci";
+ reg = <0x00023000 0x1000>;
+ interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
+ phys = <&usb3_phy>;
+ phy-names = "usb";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ xhci_port1: port@1 {
+ reg = <1>;
+ #trigger-source-cells = <0>;
+ };
+ };
+ };
+ };
+
+ mdio: mdio@18003000 {
+ compatible = "brcm,iproc-mdio";
+ reg = <0x18003000 0x8>;
+ #size-cells = <0>;
+ #address-cells = <1>;
+ };
+
+ dmu-bus@1800c000 {
+ compatible = "simple-bus";
+ ranges = <0 0x1800c000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cru-bus@100 {
+ compatible = "brcm,ns-cru", "simple-mfd";
+ reg = <0x100 0x1a4>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ usb2_phy: phy@164 {
+ compatible = "brcm,ns-usb2-phy";
+ reg = <0x164 0x4>;
+ brcm,syscon-clkset = <&cru_clkset>;
+ clocks = <&genpll BCM_NSP_GENPLL_USB_PHY_REF_CLK>;
+ clock-names = "phy-ref-clk";
+ #phy-cells = <0>;
+ };
+
+ cru_clkset: syscon@180 {
+ compatible = "brcm,cru-clkset", "syscon";
+ reg = <0x180 0x4>;
+ };
+
+ pinctrl: pinctrl@1c0 {
+ compatible = "brcm,bcm4708-pinmux";
+ reg = <0x1c0 0x24>;
+ reg-names = "cru_gpio_control";
+
+ spi-pins {
+ groups = "spi_grp";
+ function = "spi";
+ };
+
+ pinmux_i2c: i2c-pins {
+ groups = "i2c_grp";
+ function = "i2c";
+ };
+
+ pinmux_pwm: pwm-pins {
+ groups = "pwm0_grp", "pwm1_grp",
+ "pwm2_grp", "pwm3_grp";
+ function = "pwm";
+ };
+
+ pinmux_uart1: uart1-pins {
+ groups = "uart1_grp";
+ function = "uart1";
+ };
+ };
+
+ thermal: thermal@2c0 {
+ compatible = "brcm,ns-thermal";
+ reg = <0x2c0 0x10>;
+ #thermal-sensor-cells = <0>;
+ };
+ };
+ };
+
+ thermal-zones {
+ cpu_thermal: cpu-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <1000>;
+ coefficients = <(-556) 418000>;
+ thermal-sensors = <&thermal>;
+
+ trips {
+ cpu-crit {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ };
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi
index 5fc1b847f4aa..2aa3a9f09641 100644
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
@@ -8,11 +8,7 @@
* Licensed under the GNU/GPL. See COPYING for details.
*/
-#include <dt-bindings/clock/bcm-nsp.h>
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include "bcm-ns.dtsi"
/ {
#address-cells = <1>;
@@ -149,12 +145,6 @@ periph_clk: periph_clk {
};
axi@18000000 {
- compatible = "brcm,bus-axi";
- reg = <0x18000000 0x1000>;
- ranges = <0x00000000 0x18000000 0x00100000>;
- #address-cells = <1>;
- #size-cells = <1>;
-
#interrupt-cells = <1>;
interrupt-map-mask = <0x000fffff 0xffff>;
interrupt-map =
@@ -228,108 +218,15 @@ axi@18000000 {
<0x00028000 6 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
<0x00028000 7 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
- chipcommon: chipcommon@0 {
- reg = <0x00000000 0x1000>;
-
- gpio-controller;
- #gpio-cells = <2>;
+ chipcommon@0 {
interrupt-controller;
#interrupt-cells = <2>;
};
- pcie0: pcie@12000 {
- reg = <0x00012000 0x1000>;
- };
-
- pcie1: pcie@13000 {
- reg = <0x00013000 0x1000>;
- };
-
pcie2: pcie@14000 {
reg = <0x00014000 0x1000>;
};
- usb2: usb2@21000 {
- reg = <0x00021000 0x1000>;
-
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- interrupt-parent = <&gic>;
-
- ehci: usb@21000 {
- #usb-cells = <0>;
-
- compatible = "generic-ehci";
- reg = <0x00021000 0x1000>;
- interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&usb2_phy>;
-
- #address-cells = <1>;
- #size-cells = <0>;
-
- ehci_port1: port@1 {
- reg = <1>;
- #trigger-source-cells = <0>;
- };
-
- ehci_port2: port@2 {
- reg = <2>;
- #trigger-source-cells = <0>;
- };
- };
-
- ohci: usb@22000 {
- #usb-cells = <0>;
-
- compatible = "generic-ohci";
- reg = <0x00022000 0x1000>;
- interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
-
- #address-cells = <1>;
- #size-cells = <0>;
-
- ohci_port1: port@1 {
- reg = <1>;
- #trigger-source-cells = <0>;
- };
-
- ohci_port2: port@2 {
- reg = <2>;
- #trigger-source-cells = <0>;
- };
- };
- };
-
- usb3: usb3@23000 {
- reg = <0x00023000 0x1000>;
-
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- interrupt-parent = <&gic>;
-
- xhci: usb@23000 {
- #usb-cells = <0>;
-
- compatible = "generic-xhci";
- reg = <0x00023000 0x1000>;
- interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&usb3_phy>;
- phy-names = "usb";
-
- #address-cells = <1>;
- #size-cells = <0>;
-
- xhci_port1: port@1 {
- reg = <1>;
- #trigger-source-cells = <0>;
- };
- };
- };
-
gmac0: ethernet@24000 {
reg = <0x24000 0x800>;
};
@@ -355,13 +252,6 @@ pwm: pwm@18002000 {
status = "disabled";
};
- mdio: mdio@18003000 {
- compatible = "brcm,iproc-mdio";
- reg = <0x18003000 0x8>;
- #size-cells = <0>;
- #address-cells = <1>;
- };
-
mdio-mux@18003000 {
compatible = "mdio-mux-mmioreg", "mdio-mux";
mdio-parent-bus = <&mdio>;
@@ -409,18 +299,7 @@ i2c0: i2c@18009000 {
};
dmu-bus@1800c000 {
- compatible = "simple-bus";
- ranges = <0 0x1800c000 0x1000>;
- #address-cells = <1>;
- #size-cells = <1>;
-
cru-bus@100 {
- compatible = "brcm,ns-cru", "simple-mfd";
- reg = <0x100 0x1a4>;
- ranges;
- #address-cells = <1>;
- #size-cells = <1>;
-
lcpll0: clock-controller@100 {
#clock-cells = <1>;
compatible = "brcm,nsp-lcpll0";
@@ -440,53 +319,6 @@ genpll: clock-controller@140 {
"usbclk", "iprocfast",
"sata1", "sata2";
};
-
- usb2_phy: phy@164 {
- compatible = "brcm,ns-usb2-phy";
- reg = <0x164 0x4>;
- brcm,syscon-clkset = <&cru_clkset>;
- clocks = <&genpll BCM_NSP_GENPLL_USB_PHY_REF_CLK>;
- clock-names = "phy-ref-clk";
- #phy-cells = <0>;
- };
-
- cru_clkset: syscon@180 {
- compatible = "brcm,cru-clkset", "syscon";
- reg = <0x180 0x4>;
- };
-
- pinctrl: pinctrl@1c0 {
- compatible = "brcm,bcm4708-pinmux";
- reg = <0x1c0 0x24>;
- reg-names = "cru_gpio_control";
-
- spi-pins {
- groups = "spi_grp";
- function = "spi";
- };
-
- pinmux_i2c: i2c-pins {
- groups = "i2c_grp";
- function = "i2c";
- };
-
- pinmux_pwm: pwm-pins {
- groups = "pwm0_grp", "pwm1_grp",
- "pwm2_grp", "pwm3_grp";
- function = "pwm";
- };
-
- pinmux_uart1: uart1-pins {
- groups = "uart1_grp";
- function = "uart1";
- };
- };
-
- thermal: thermal@2c0 {
- compatible = "brcm,ns-thermal";
- reg = <0x2c0 0x10>;
- #thermal-sensor-cells = <0>;
- };
};
};
@@ -558,24 +390,4 @@ partitions {
};
};
};
-
- thermal-zones {
- cpu_thermal: cpu-thermal {
- polling-delay-passive = <0>;
- polling-delay = <1000>;
- coefficients = <(-556) 418000>;
- thermal-sensors = <&thermal>;
-
- trips {
- cpu-crit {
- temperature = <125000>;
- hysteresis = <0>;
- type = "critical";
- };
- };
-
- cooling-maps {
- };
- };
- };
};
--
2.35.3
^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH 2/2] ARM: dts: BCM5301X: Relicense Florian's code to the GPL 2.0+ / MIT
2023-05-03 12:16 [PATCH 1/2] ARM: dts: BCM5301X: Relicense Rafał's code to the GPL 2.0+ / MIT Rafał Miłecki
@ 2023-05-03 12:16 ` Rafał Miłecki
2023-05-08 18:50 ` Florian Fainelli
2023-05-08 18:49 ` [PATCH 1/2] ARM: dts: BCM5301X: Relicense =?iso-8859-2?Q?Rafa=B3's?= " Florian Fainelli
1 sibling, 1 reply; 4+ messages in thread
From: Rafał Miłecki @ 2023-05-03 12:16 UTC (permalink / raw)
To: Florian Fainelli
Cc: Hauke Mehrtens, Rob Herring, Krzysztof Kozlowski,
linux-arm-kernel, devicetree, bcm-kernel-feedback-list,
Rafał Miłecki
From: Rafał Miłecki <rafal@milecki.pl>
All BCM5301X device DTS files use dual licensing. Try the same for SoC.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
arch/arm/boot/dts/bcm-ns.dtsi | 36 ++++++++++++++++++++++++++++++
arch/arm/boot/dts/bcm5301x.dtsi | 39 ---------------------------------
2 files changed, 36 insertions(+), 39 deletions(-)
diff --git a/arch/arm/boot/dts/bcm-ns.dtsi b/arch/arm/boot/dts/bcm-ns.dtsi
index 21d672aba75a..cc977bbc142b 100644
--- a/arch/arm/boot/dts/bcm-ns.dtsi
+++ b/arch/arm/boot/dts/bcm-ns.dtsi
@@ -19,6 +19,8 @@ chipcommon: chipcommon@0 {
gpio-controller;
#gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
};
pcie0: pcie@12000 {
@@ -109,6 +111,22 @@ xhci_port1: port@1 {
};
};
};
+
+ gmac0: ethernet@24000 {
+ reg = <0x24000 0x800>;
+ };
+
+ gmac1: ethernet@25000 {
+ reg = <0x25000 0x800>;
+ };
+
+ gmac2: ethernet@26000 {
+ reg = <0x26000 0x800>;
+ };
+
+ gmac3: ethernet@27000 {
+ reg = <0x27000 0x800>;
+ };
};
mdio: mdio@18003000 {
@@ -118,6 +136,24 @@ mdio: mdio@18003000 {
#address-cells = <1>;
};
+ rng: rng@18004000 {
+ compatible = "brcm,bcm5301x-rng";
+ reg = <0x18004000 0x14>;
+ };
+
+ srab: ethernet-switch@18007000 {
+ compatible = "brcm,bcm53011-srab", "brcm,bcm5301x-srab";
+ reg = <0x18007000 0x1000>;
+
+ status = "disabled";
+
+ /* ports are defined in board DTS */
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
dmu-bus@1800c000 {
compatible = "simple-bus";
ranges = <0 0x1800c000 0x1000>;
diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi
index 2aa3a9f09641..2890fa3c5e67 100644
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
@@ -218,30 +218,9 @@ axi@18000000 {
<0x00028000 6 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
<0x00028000 7 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
- chipcommon@0 {
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
pcie2: pcie@14000 {
reg = <0x00014000 0x1000>;
};
-
- gmac0: ethernet@24000 {
- reg = <0x24000 0x800>;
- };
-
- gmac1: ethernet@25000 {
- reg = <0x25000 0x800>;
- };
-
- gmac2: ethernet@26000 {
- reg = <0x26000 0x800>;
- };
-
- gmac3: ethernet@27000 {
- reg = <0x27000 0x800>;
- };
};
pwm: pwm@18002000 {
@@ -322,24 +301,6 @@ genpll: clock-controller@140 {
};
};
- srab: ethernet-switch@18007000 {
- compatible = "brcm,bcm53011-srab", "brcm,bcm5301x-srab";
- reg = <0x18007000 0x1000>;
-
- status = "disabled";
-
- /* ports are defined in board DTS */
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
- };
- };
-
- rng: rng@18004000 {
- compatible = "brcm,bcm5301x-rng";
- reg = <0x18004000 0x14>;
- };
-
nand_controller: nand-controller@18028000 {
compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1", "brcm,brcmnand";
reg = <0x18028000 0x600>, <0x1811a408 0x600>, <0x18028f00 0x20>;
--
2.35.3
^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [PATCH 2/2] ARM: dts: BCM5301X: Relicense Florian's code to the GPL 2.0+ / MIT
2023-05-03 12:16 ` [PATCH 2/2] ARM: dts: BCM5301X: Relicense Florian's " Rafał Miłecki
@ 2023-05-08 18:50 ` Florian Fainelli
0 siblings, 0 replies; 4+ messages in thread
From: Florian Fainelli @ 2023-05-08 18:50 UTC (permalink / raw)
To: bcm-kernel-feedback-list, Rafał Miłecki
Cc: Hauke Mehrtens, Rob Herring, Krzysztof Kozlowski,
linux-arm-kernel, devicetree, Rafał Miłecki
On Wed, 3 May 2023 14:16:11 +0200, Rafał Miłecki <zajec5@gmail.com> wrote:
> From: Rafał Miłecki <rafal@milecki.pl>
>
> All BCM5301X device DTS files use dual licensing. Try the same for SoC.
>
> Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
> ---
Applied to https://github.com/Broadcom/stblinux/commits/devicetree/next, thanks!
--
Florian
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH 1/2] ARM: dts: BCM5301X: Relicense =?iso-8859-2?Q?Rafa=B3's?= code to the GPL 2.0+ / MIT
2023-05-03 12:16 [PATCH 1/2] ARM: dts: BCM5301X: Relicense Rafał's code to the GPL 2.0+ / MIT Rafał Miłecki
2023-05-03 12:16 ` [PATCH 2/2] ARM: dts: BCM5301X: Relicense Florian's " Rafał Miłecki
@ 2023-05-08 18:49 ` Florian Fainelli
1 sibling, 0 replies; 4+ messages in thread
From: Florian Fainelli @ 2023-05-08 18:49 UTC (permalink / raw)
To: bcm-kernel-feedback-list, Rafał Miłecki
Cc: Hauke Mehrtens, Rob Herring, Krzysztof Kozlowski,
linux-arm-kernel, devicetree, Rafał Miłecki
On Wed, 3 May 2023 14:16:10 +0200, Rafał Miłecki <zajec5@gmail.com> wrote:
> From: Rafał Miłecki <rafal@milecki.pl>
>
> All BCM5301X device DTS files use dual licensing. Try the same for SoC.
> Introduce a new .dtsi file with a proper SPDX tag.
>
> Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
> ---
Applied to https://github.com/Broadcom/stblinux/commits/devicetree/next, thanks!
--
Florian
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2023-05-08 18:50 UTC | newest]
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2023-05-03 12:16 [PATCH 1/2] ARM: dts: BCM5301X: Relicense Rafał's code to the GPL 2.0+ / MIT Rafał Miłecki
2023-05-03 12:16 ` [PATCH 2/2] ARM: dts: BCM5301X: Relicense Florian's " Rafał Miłecki
2023-05-08 18:50 ` Florian Fainelli
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