From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
To: Michal Simek <michal.simek@amd.com>
Cc: linux-kernel@vger.kernel.org, monstr@monstr.eu,
michal.simek@xilinx.com, git@xilinx.com,
Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>,
Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Parth Gajjar <parth.gajjar@amd.com>,
Rob Herring <robh+dt@kernel.org>,
Srinivas Neeli <srinivas.neeli@xilinx.com>,
Vishal Sagar <vishal.sagar@amd.com>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 03/23] arm64: zynqmp: Set qspi tx-buswidth to 4
Date: Wed, 10 May 2023 09:56:23 +0300 [thread overview]
Message-ID: <20230510065623.GC11711@pendragon.ideasonboard.com> (raw)
In-Reply-To: <0cc9dce0330abf3df46252ab63a3930bded23e4b.1683034376.git.michal.simek@amd.com>
Hi Michal,
Thank you for the patch.
On Tue, May 02, 2023 at 03:35:31PM +0200, Michal Simek wrote:
> From: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>
>
> All ZynqMP boards are setting up tx-buswidth to 1. Due to this the
> framework only issues 1-1-1 write commands to the GQSPI driver. But the
> GQSPI controller is capable of handling 1-4-4 write commands, so updated
> the tx-buswidth to 4.
> This would enable the spi-nor framework to issue 1-4-4 write commands
> instead of 1-1-1. This will increase the tx data transfer rate, as now the
> tx data will be transferred on four lines instead on single line.
The change seems OK, but the commit message shouldn't mention drivers.
DT is a hardware description, the commit message should focus on that.
> Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>
> Signed-off-by: Michal Simek <michal.simek@amd.com>
> ---
>
> arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts | 2 +-
> arch/arm64/boot/dts/xilinx/zynqmp-zc1232-revA.dts | 2 +-
> arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dts | 2 +-
> arch/arm64/boot/dts/xilinx/zynqmp-zc1275-revA.dts | 2 +-
> arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts | 2 +-
> arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts | 2 +-
> arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts | 2 +-
> arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts | 2 +-
> arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts | 2 +-
> arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts | 2 +-
> arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts | 2 +-
> 11 files changed, 11 insertions(+), 11 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts
> index 34412304d09f..dcc17e3ea961 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-sm-k26-revA.dts
> @@ -85,7 +85,7 @@ flash@0 { /* MT25QU512A */
> #address-cells = <1>;
> #size-cells = <1>;
> reg = <0>;
> - spi-tx-bus-width = <1>;
> + spi-tx-bus-width = <4>;
> spi-rx-bus-width = <4>;
> spi-max-frequency = <40000000>; /* 40MHz */
> partition@0 {
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1232-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1232-revA.dts
> index f1598527e5ec..4d301ea0bdcb 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1232-revA.dts
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1232-revA.dts
> @@ -44,7 +44,7 @@ flash@0 {
> #address-cells = <1>;
> #size-cells = <1>;
> reg = <0x0>;
> - spi-tx-bus-width = <1>;
> + spi-tx-bus-width = <4>;
> spi-rx-bus-width = <4>;
> spi-max-frequency = <108000000>; /* Based on DC1 spec */
> };
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dts
> index 04efa1683eaa..485a7b21157a 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dts
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1254-revA.dts
> @@ -45,7 +45,7 @@ flash@0 {
> #address-cells = <1>;
> #size-cells = <1>;
> reg = <0x0>;
> - spi-tx-bus-width = <1>;
> + spi-tx-bus-width = <4>;
> spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
> spi-max-frequency = <108000000>; /* Based on DC1 spec */
> };
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1275-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1275-revA.dts
> index e971ba8c1418..676b8550a625 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1275-revA.dts
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1275-revA.dts
> @@ -47,7 +47,7 @@ &qspi {
> flash@0 {
> compatible = "m25p80", "jedec,spi-nor";
> reg = <0x0>;
> - spi-tx-bus-width = <1>;
> + spi-tx-bus-width = <4>;
> spi-rx-bus-width = <4>;
> spi-max-frequency = <108000000>;
> };
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts
> index 5fa9604f05d1..35fe7857459a 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm015-dc1.dts
> @@ -355,7 +355,7 @@ flash@0 {
> #address-cells = <1>;
> #size-cells = <1>;
> reg = <0x0>;
> - spi-tx-bus-width = <1>;
> + spi-tx-bus-width = <4>;
> spi-rx-bus-width = <4>;
> spi-max-frequency = <108000000>; /* Based on DC1 spec */
> };
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts
> index 6e0106bf1294..311cb2f81c7b 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm018-dc4.dts
> @@ -173,7 +173,7 @@ flash@0 {
> #address-cells = <1>;
> #size-cells = <1>;
> reg = <0x0>;
> - spi-tx-bus-width = <1>;
> + spi-tx-bus-width = <4>;
> spi-rx-bus-width = <4>; /* also DUAL configuration possible */
> spi-max-frequency = <108000000>; /* Based on DC1 spec */
> };
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
> index 78043d9de7cc..5b6403865541 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
> @@ -957,7 +957,7 @@ flash@0 {
> #address-cells = <1>;
> #size-cells = <1>;
> reg = <0x0>;
> - spi-tx-bus-width = <1>;
> + spi-tx-bus-width = <4>;
> spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
> spi-max-frequency = <108000000>; /* Based on DC1 spec */
> };
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts
> index c1779c88ec34..a74a2061431a 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts
> @@ -444,7 +444,7 @@ flash@0 {
> #address-cells = <1>;
> #size-cells = <1>;
> reg = <0x0>;
> - spi-tx-bus-width = <1>;
> + spi-tx-bus-width = <4>;
> spi-rx-bus-width = <4>;
> spi-max-frequency = <108000000>; /* Based on DC1 spec */
> };
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts
> index b857c1950496..73972d83ed4d 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts
> @@ -456,7 +456,7 @@ flash@0 {
> #address-cells = <1>;
> #size-cells = <1>;
> reg = <0x0>;
> - spi-tx-bus-width = <1>;
> + spi-tx-bus-width = <4>;
> spi-rx-bus-width = <4>;
> spi-max-frequency = <108000000>; /* Based on DC1 spec */
> };
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts
> index e4e09afbdc1a..5a54d066db86 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts
> @@ -964,7 +964,7 @@ flash@0 {
> #address-cells = <1>;
> #size-cells = <1>;
> reg = <0x0>;
> - spi-tx-bus-width = <1>;
> + spi-tx-bus-width = <4>;
> spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
> spi-max-frequency = <108000000>; /* Based on DC1 spec */
> };
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
> index 791b2ac9fbdb..3b37df98700c 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
> @@ -794,7 +794,7 @@ flash@0 {
> #address-cells = <1>;
> #size-cells = <1>;
> reg = <0x0>;
> - spi-tx-bus-width = <1>;
> + spi-tx-bus-width = <4>;
> spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */
> spi-max-frequency = <108000000>; /* Based on DC1 spec */
> };
--
Regards,
Laurent Pinchart
next prev parent reply other threads:[~2023-05-10 6:56 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-02 13:35 [PATCH 00/23] arm64: zynqmp: Misc zynqmp changes Michal Simek
2023-05-02 13:35 ` [PATCH 01/23] arm64: zynqmp: Describe TI phy as ethernet-phy-id Michal Simek
2023-05-10 6:52 ` Laurent Pinchart
2023-05-10 7:11 ` Michal Simek
2023-05-02 13:35 ` [PATCH 02/23] arm64: zynqmp: Fix usb node drive strength and slew rate Michal Simek
2023-05-10 6:54 ` Laurent Pinchart
2023-05-16 13:30 ` Michal Simek
2023-05-02 13:35 ` [PATCH 03/23] arm64: zynqmp: Set qspi tx-buswidth to 4 Michal Simek
2023-05-10 6:56 ` Laurent Pinchart [this message]
2023-05-02 13:35 ` [PATCH 04/23] arm64: zynqmp: Fix usb reset over bootmode pins on zcu100 Michal Simek
2023-05-16 11:05 ` Michal Simek
2023-05-02 13:35 ` [PATCH 05/23] arm64: zynqmp: Add L2 cache nodes Michal Simek
2023-05-10 6:57 ` Laurent Pinchart
2023-05-10 7:15 ` Michal Simek
2023-05-10 11:34 ` Laurent Pinchart
2023-05-02 13:35 ` [PATCH 06/23] arm64: zynqmp: Sync node name address with reg (mailbox) Michal Simek
2023-05-10 6:58 ` Laurent Pinchart
2023-05-16 10:57 ` Michal Simek
2023-05-02 13:35 ` [PATCH 07/23] arm64: zynqmp: Add pmu interrupt-affinity Michal Simek
2023-05-10 7:00 ` Laurent Pinchart
2023-05-16 11:05 ` Michal Simek
2023-05-16 12:49 ` Michal Simek
2023-05-02 13:35 ` [PATCH 08/23] arm64: zynqmp: Add resets property to sdhci nodes Michal Simek
2023-05-10 7:02 ` Laurent Pinchart
2023-05-16 10:56 ` Michal Simek
2023-05-02 13:35 ` [PATCH 09/23] arm64: zynqmp: Add dmas, dp, rtc, watchdogs and opp nodes for SOM Michal Simek
2023-05-16 11:06 ` Michal Simek
2023-05-02 13:35 ` [PATCH 10/23] arm64: zynqmp: Add linux,code for gpio button Michal Simek
2023-05-16 11:07 ` Michal Simek
2023-05-02 13:35 ` [PATCH 11/23] arm64: zynqmp: Use assigned-clock-rates for setting up SD clock in SOM Michal Simek
2023-05-16 11:07 ` Michal Simek
2023-05-02 13:35 ` [PATCH 12/23] arm64: zynqmp: Add mtd partition for secure OS storage area Michal Simek
2023-05-16 11:07 ` Michal Simek
2023-05-02 13:35 ` [PATCH 13/23] arm64: zynqmp: Used fixed-partitions for QSPI in k26 Michal Simek
2023-05-02 13:35 ` [PATCH 14/23] arm64: zynqmp: Add gpio labels for modepin gpio Michal Simek
2023-05-16 11:08 ` Michal Simek
2023-05-02 13:35 ` [PATCH 15/23] arm64: zynqmp: Add pinctrl emmc description to SM-K26 Michal Simek
2023-05-16 11:08 ` Michal Simek
2023-05-02 13:35 ` [PATCH 16/23] arm64: zynqmp: Disable USB3.0 for zc1751-xm016-dc2 Michal Simek
2023-05-16 11:08 ` Michal Simek
2023-05-02 13:35 ` [PATCH 17/23] arm64: zynqmp: Switch to ethernet-phy-id in kv260 Michal Simek
2023-05-16 11:09 ` Michal Simek
2023-05-02 13:35 ` [PATCH 18/23] arm64: zynqmp: Setup clock for DP and DPDMA Michal Simek
2023-05-16 11:09 ` Michal Simek
2023-05-02 13:35 ` [PATCH 19/23] arm64: zynqmp: Enable DP driver for SOMs Michal Simek
2023-05-16 11:09 ` Michal Simek
2023-05-02 13:35 ` [PATCH 20/23] arm64: zynqmp: Rename ams_ps/pl node names Michal Simek
2023-05-10 8:32 ` Laurent Pinchart
2023-05-16 10:56 ` Michal Simek
2023-05-02 13:35 ` [PATCH 21/23] arm64: zynqmp: Enable AMS on SOM and other zcu10x boards Michal Simek
2023-05-16 11:10 ` Michal Simek
2023-05-02 13:35 ` [PATCH 22/23] arm64: zynqmp: Describe bus-width for SD card on KV260 Michal Simek
2023-05-16 11:10 ` Michal Simek
2023-05-02 13:35 ` [PATCH 23/23] arm64: zynqmp: Add phase tags marking Michal Simek
2023-05-16 11:10 ` Michal Simek
2023-05-16 11:11 ` [PATCH 00/23] arm64: zynqmp: Misc zynqmp changes Michal Simek
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