Re: [PATCH v1 2/2] riscv: dts: starfive: jh7110: Add watchdog node

[Conor Dooley <conor@kernel.org>]

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On Tue, May 09, 2023 at 11:17:23PM +0800, Xingyu Wu wrote:
> Add the watchdog node for the Starfive JH7110 SoC.

Emil or Walker, could I get a review on this please?
It's the only dts patch on the list right now for the jh7110 that I can
actually apply, so it'd be nice to do so.

Thanks,
Conor.

> 
> Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
> ---
>  arch/riscv/boot/dts/starfive/jh7110.dtsi | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> index 4c5fdb905da8..47c163ec0bf1 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
> +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> @@ -469,6 +469,16 @@ sysgpio: pinctrl@13040000 {
>  			#gpio-cells = <2>;
>  		};
>  
> +		watchdog@13070000 {
> +			compatible = "starfive,jh7110-wdt";
> +			reg = <0x0 0x13070000 0x0 0x10000>;
> +			clocks = <&syscrg JH7110_SYSCLK_WDT_APB>,
> +				 <&syscrg JH7110_SYSCLK_WDT_CORE>;
> +			clock-names = "apb", "core";
> +			resets = <&syscrg JH7110_SYSRST_WDT_APB>,
> +				 <&syscrg JH7110_SYSRST_WDT_CORE>;
> +		};
> +
>  		aoncrg: clock-controller@17000000 {
>  			compatible = "starfive,jh7110-aoncrg";
>  			reg = <0x0 0x17000000 0x0 0x10000>;
> -- 
> 2.25.1
> 

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