From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 174D5C7EE39 for ; Fri, 12 May 2023 21:18:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240426AbjELVSH (ORCPT ); Fri, 12 May 2023 17:18:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46568 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240411AbjELVSF (ORCPT ); Fri, 12 May 2023 17:18:05 -0400 Received: from mail-lf1-x12f.google.com (mail-lf1-x12f.google.com [IPv6:2a00:1450:4864:20::12f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CD94DCE for ; Fri, 12 May 2023 14:17:35 -0700 (PDT) Received: by mail-lf1-x12f.google.com with SMTP id 2adb3069b0e04-4f139de8cefso54447825e87.0 for ; Fri, 12 May 2023 14:17:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1683926251; x=1686518251; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=5iW3mmY96sQxjUKo34y7+XwQg6+9i3DKhyWyNobWBts=; b=c+hBGrHAL/Vr6QNx4UsVxn0VAsBldOO3qdSo8XsrqwozOMB7tjn1TPbxK4ZCkU6+Lq VzwWpas0PbKxMMpoFQdBb0ZyfNuw/JPvjBYaKLRNf1FVESWpjpr0KHezR6dfRWdCBiUw Vg/ifMp3aF3cB3evCSeEAmdPHqT5DI8NLNThzjYLJr+SpXL3F1tRVjt1+83D0N6CyGwR UcrwZNt39bHxm1bzpi8sdE8HP9zoLx7QtcmQfyrFEtkg6LWagNG72v20eDXwtPpYcOEQ wGvB6jO3wdtp6mqHO7witmnkVlWikzR/8xB9sqXKro/DWtgzBm0EDwAUxW5Q0wIGkGrN fyPg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1683926251; x=1686518251; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=5iW3mmY96sQxjUKo34y7+XwQg6+9i3DKhyWyNobWBts=; b=lE9Uj037dlJwZeqDRngf7WGNT7z2MGJEF+cKbm0erR9O7YxVdTVyaqa+FN/h/6hDCU w/MpTHcc9dTJgvkg98Yc1X8pjHfprNRUCPDxzvozv+gqzfbfhK0mb7PwMCOUNAf7Icuj P5Y02ntSDgT6EqddmB5CsElG+COpjsGTEc2H7L/PXZDL7XhMiTZJPKKvdP3zRG/BSim2 /h4PWmnjKTLgiB/WBp99pBaoU+25qNaO0IfJPkCT6WJgU5K0rbilUrtthqVbL4kBt5fr G5/JX4/vvHNlm5meIfz9T6+zBpjPcHmGzGmqiahsagS49YVFiTJcuBPwCEUoONH3kZA4 ak9w== X-Gm-Message-State: AC+VfDyoXlQXndliPXGFwR6/AC773NwJZr5G3Hre0wa74/4dbKMOAW6z 74uxm25Mugn9Wq6ffN7mM0fUiA== X-Google-Smtp-Source: ACHHUZ7kfO15yetan79qVIXVhbfKZgEauqkdd2EqASeHmdnEoPs6ok7tJwWeOZIU+wIrd5IgRve2zA== X-Received: by 2002:ac2:4d03:0:b0:4ef:ebbb:2cf5 with SMTP id r3-20020ac24d03000000b004efebbb2cf5mr4678925lfi.17.1683926251414; Fri, 12 May 2023 14:17:31 -0700 (PDT) Received: from umbar.unikie.fi ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id w4-20020ac254a4000000b004edafe3f8dbsm1590363lfk.11.2023.05.12.14.17.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 May 2023 14:17:30 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Stephen Boyd , Michael Turquette , Rob Herring , Krzysztof Kozlowski , Taniya Das Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, Krzysztof Kozlowski Subject: [PATCH v3 03/10] dt-bindings: clock: provide separate bindings for qcom,gcc-mdm9615 Date: Sat, 13 May 2023 00:17:20 +0300 Message-Id: <20230512211727.3445575-4-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230512211727.3445575-1-dmitry.baryshkov@linaro.org> References: <20230512211727.3445575-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The global clock controller on MDM9615 uses external CXO and PLL7 clocks. Split the qcom,gcc-mdm9615 to the separate schema file. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Dmitry Baryshkov --- .../bindings/clock/qcom,gcc-mdm9615.yaml | 47 +++++++++++++++++++ .../bindings/clock/qcom,gcc-other.yaml | 3 -- 2 files changed, 47 insertions(+), 3 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/qcom,gcc-mdm9615.yaml diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-mdm9615.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-mdm9615.yaml new file mode 100644 index 000000000000..69162ac4a0da --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-mdm9615.yaml @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,gcc-mdm9615.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Global Clock & Reset Controller on MDM9615 + +maintainers: + - Stephen Boyd + - Taniya Das + +description: | + Qualcomm global clock control module provides the clocks, resets and power + domains on MDM9615. + + See also:: + include/dt-bindings/clock/qcom,gcc-mdm9615.h + include/dt-bindings/reset/qcom,gcc-mdm9615.h + +allOf: + - $ref: qcom,gcc.yaml# + +properties: + compatible: + const: qcom,gcc-mdm9615 + + clocks: + maxItems: 2 + +required: + - compatible + +unevaluatedProperties: false + +examples: + - | + #include + clock-controller@900000 { + compatible = "qcom,gcc-mdm9615"; + reg = <0x00900000 0x4000>; + #power-domain-cells = <1>; + #clock-cells = <1>; + #reset-cells = <1>; + clocks = <&cxo_board>, <&lcc PLL4>; + }; +... diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml index ae01e7749534..b6e260755a21 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml @@ -19,8 +19,6 @@ description: | include/dt-bindings/reset/qcom,gcc-ipq6018.h include/dt-bindings/clock/qcom,gcc-msm8953.h include/dt-bindings/clock/qcom,gcc-mdm9607.h - include/dt-bindings/clock/qcom,gcc-mdm9615.h - include/dt-bindings/reset/qcom,gcc-mdm9615.h allOf: - $ref: qcom,gcc.yaml# @@ -31,7 +29,6 @@ properties: - qcom,gcc-ipq6018 - qcom,gcc-mdm9607 - qcom,gcc-msm8953 - - qcom,gcc-mdm9615 required: - compatible -- 2.39.2