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Date:   Sun, 14 May 2023 20:56:52 +0800
From:   Shawn Guo <shawnguo@kernel.org>
To:     Hugo Villeneuve <hugo@hugovil.com>
Cc:     Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Sascha Hauer <s.hauer@pengutronix.de>,
        Pengutronix Kernel Team <kernel@pengutronix.de>,
        Fabio Estevam <festevam@gmail.com>,
        NXP Linux Team <linux-imx@nxp.com>,
        Hugo Villeneuve <hvilleneuve@dimonoff.com>,
        Krzysztof Kozlowski <krzk@kernel.org>,
        devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] arm64: dts: imx8mn-var-som: fix PHY detection bug by
 adding deassert delay
Message-ID: <20230514125652.GU727834@dragon>
References: <20230501170531.2961459-1-hugo@hugovil.com>
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On Mon, May 01, 2023 at 01:05:32PM -0400, Hugo Villeneuve wrote:
> From: Hugo Villeneuve <hvilleneuve@dimonoff.com>
> 
> While testing the ethernet interface on a Variscite symphony carrier
> board using an imx8mn SOM with an onboard ADIN1300 PHY (EC hardware
> configuration), the ethernet PHY is not detected.
> 
> The ADIN1300 datasheet indicate that the "Management interface
> active (t4)" state is reached at most 5ms after the reset signal is
> deasserted.
> 
> The device tree in Variscite custom git repository uses the following
> property:
> 
>     phy-reset-post-delay = <20>;
> 
> Add a new MDIO property 'reset-deassert-us' of 20ms to have the same
> delay inside the ethphy node. Adding this property fixes the problem
> with the PHY detection.
> 
> Note that this SOM can also have an Atheros AR8033 PHY. In this case,
> a 1ms deassert delay is sufficient. Add a comment to that effect.
> 
> Fixes: ade0176dd8a0 ("arm64: dts: imx8mn-var-som: Add Variscite
> VAR-SOM-MX8MN System on Module")
> 
> Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>

Applied, thanks!