[PATCH v1 0/2] Add watchdog nodes in StarFive JH7100/JH7110 DTS

[PATCH v1 0/2] Add watchdog nodes in StarFive JH7100/JH7110 DTS

[Xingyu Wu]

Hi, this patch serises add watchdog nodes in DTS for the StarFive JH7100
and JH7110 SoCs. Patch 1 adds the node in JH7100 dts and Patch 2 adds it
in JH7110 dts. This patch serises are based on Linux 6.4-rc1.

Xingyu Wu (2):
  riscv: dts: starfive: jh7100: Add watchdog node
  riscv: dts: starfive: jh7110: Add watchdog node

 arch/riscv/boot/dts/starfive/jh7100.dtsi | 10 ++++++++++
 arch/riscv/boot/dts/starfive/jh7110.dtsi | 10 ++++++++++
 2 files changed, 20 insertions(+)

-- 
2.25.1

[PATCH v1 1/2] riscv: dts: starfive: jh7100: Add watchdog node

[Xingyu Wu]

Add watchdog node for the StarFive JH7100 RISC-V SoC.

Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
---
 arch/riscv/boot/dts/starfive/jh7100.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/riscv/boot/dts/starfive/jh7100.dtsi b/arch/riscv/boot/dts/starfive/jh7100.dtsi
index 000447482aca..4218621ea3b9 100644
--- a/arch/riscv/boot/dts/starfive/jh7100.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7100.dtsi
@@ -238,5 +238,15 @@ i2c3: i2c@12460000 {
 			#size-cells = <0>;
 			status = "disabled";
 		};
+
+		watchdog@12480000 {
+			compatible = "starfive,jh7100-wdt";
+			reg = <0x0 0x12480000 0x0 0x10000>;
+			clocks = <&clkgen JH7100_CLK_WDTIMER_APB>,
+				 <&clkgen JH7100_CLK_WDT_CORE>;
+			clock-names = "apb", "core";
+			resets = <&rstgen JH7100_RSTN_WDTIMER_APB>,
+				 <&rstgen JH7100_RSTN_WDT>;
+		};
 	};
 };
-- 
2.25.1

[PATCH v1 2/2] riscv: dts: starfive: jh7110: Add watchdog node

[Xingyu Wu]

Add the watchdog node for the Starfive JH7110 SoC.

Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
---
 arch/riscv/boot/dts/starfive/jh7110.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index 4c5fdb905da8..47c163ec0bf1 100644
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -469,6 +469,16 @@ sysgpio: pinctrl@13040000 {
 			#gpio-cells = <2>;
 		};
 
+		watchdog@13070000 {
+			compatible = "starfive,jh7110-wdt";
+			reg = <0x0 0x13070000 0x0 0x10000>;
+			clocks = <&syscrg JH7110_SYSCLK_WDT_APB>,
+				 <&syscrg JH7110_SYSCLK_WDT_CORE>;
+			clock-names = "apb", "core";
+			resets = <&syscrg JH7110_SYSRST_WDT_APB>,
+				 <&syscrg JH7110_SYSRST_WDT_CORE>;
+		};
+
 		aoncrg: clock-controller@17000000 {
 			compatible = "starfive,jh7110-aoncrg";
 			reg = <0x0 0x17000000 0x0 0x10000>;
-- 
2.25.1

Re: [PATCH v1 2/2] riscv: dts: starfive: jh7110: Add watchdog node

[Conor Dooley]

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On Tue, May 09, 2023 at 11:17:23PM +0800, Xingyu Wu wrote:
> Add the watchdog node for the Starfive JH7110 SoC.

Emil or Walker, could I get a review on this please?
It's the only dts patch on the list right now for the jh7110 that I can
actually apply, so it'd be nice to do so.

Thanks,
Conor.

> 
> Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
> ---
>  arch/riscv/boot/dts/starfive/jh7110.dtsi | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> index 4c5fdb905da8..47c163ec0bf1 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
> +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> @@ -469,6 +469,16 @@ sysgpio: pinctrl@13040000 {
>  			#gpio-cells = <2>;
>  		};
>  
> +		watchdog@13070000 {
> +			compatible = "starfive,jh7110-wdt";
> +			reg = <0x0 0x13070000 0x0 0x10000>;
> +			clocks = <&syscrg JH7110_SYSCLK_WDT_APB>,
> +				 <&syscrg JH7110_SYSCLK_WDT_CORE>;
> +			clock-names = "apb", "core";
> +			resets = <&syscrg JH7110_SYSRST_WDT_APB>,
> +				 <&syscrg JH7110_SYSRST_WDT_CORE>;
> +		};
> +
>  		aoncrg: clock-controller@17000000 {
>  			compatible = "starfive,jh7110-aoncrg";
>  			reg = <0x0 0x17000000 0x0 0x10000>;
> -- 
> 2.25.1
> 

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Re: [PATCH v1 2/2] riscv: dts: starfive: jh7110: Add watchdog node

[Walker Chen]

On 2023/5/13 6:27, Conor Dooley wrote:
> On Tue, May 09, 2023 at 11:17:23PM +0800, Xingyu Wu wrote:
>> Add the watchdog node for the Starfive JH7110 SoC.
> 
> Emil or Walker, could I get a review on this please?
> It's the only dts patch on the list right now for the jh7110 that I can
> actually apply, so it'd be nice to do so.

Of course, thank you for helping to review and apply.

Best regards,
Walker

Re: [PATCH v1 2/2] riscv: dts: starfive: jh7110: Add watchdog node

[Conor Dooley]

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On Mon, May 15, 2023 at 09:47:44AM +0800, Walker Chen wrote:
> 
> 
> On 2023/5/13 6:27, Conor Dooley wrote:
> > On Tue, May 09, 2023 at 11:17:23PM +0800, Xingyu Wu wrote:
> >> Add the watchdog node for the Starfive JH7110 SoC.
> > 
> > Emil or Walker, could I get a review on this please?
> > It's the only dts patch on the list right now for the jh7110 that I can
> > actually apply, so it'd be nice to do so.
> 
> Of course, thank you for helping to review and apply.

I was hoping that you would reply with a "Reviewed-by", your thanks is
nice to but I can't do anything with that!

Cheers,
Conor.

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Re: [PATCH v1 2/2] riscv: dts: starfive: jh7110: Add watchdog node

[Walker Chen]

On 2023/5/9 23:17, Xingyu Wu wrote:
> Add the watchdog node for the Starfive JH7110 SoC.
> 
> Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
> ---
>  arch/riscv/boot/dts/starfive/jh7110.dtsi | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> index 4c5fdb905da8..47c163ec0bf1 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
> +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> @@ -469,6 +469,16 @@ sysgpio: pinctrl@13040000 {
>  			#gpio-cells = <2>;
>  		};
>  
> +		watchdog@13070000 {
> +			compatible = "starfive,jh7110-wdt";
> +			reg = <0x0 0x13070000 0x0 0x10000>;
> +			clocks = <&syscrg JH7110_SYSCLK_WDT_APB>,
> +				 <&syscrg JH7110_SYSCLK_WDT_CORE>;
> +			clock-names = "apb", "core";
> +			resets = <&syscrg JH7110_SYSRST_WDT_APB>,
> +				 <&syscrg JH7110_SYSRST_WDT_CORE>;
> +		};
> +
>  		aoncrg: clock-controller@17000000 {
>  			compatible = "starfive,jh7110-aoncrg";
>  			reg = <0x0 0x17000000 0x0 0x10000>;


Reviewed-by: Walker Chen <walker.chen@starfivetech.com>

Thanks!

Re: [PATCH v1 0/2] Add watchdog nodes in StarFive JH7100/JH7110 DTS

[Conor Dooley]

From: Conor Dooley <conor.dooley@microchip.com>

On Tue, 09 May 2023 23:17:21 +0800, Xingyu Wu wrote:
> and JH7110 SoCs. Patch 1 adds the node in JH7100 dts and Patch 2 adds it
> in JH7110 dts. This patch serises are based on Linux 6.4-rc1.
> 
> Xingyu Wu (2):
>   riscv: dts: starfive: jh7100: Add watchdog node
>   riscv: dts: starfive: jh7110: Add watchdog node
> 
> [...]

Applied to riscv-dt-for-next, thanks!

[1/2] riscv: dts: starfive: jh7100: Add watchdog node
      https://git.kernel.org/conor/c/435ac3fbfbc6
[2/2] riscv: dts: starfive: jh7110: Add watchdog node
      https://git.kernel.org/conor/c/6361b7de262a

Thanks,
Conor.