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From: Konrad Dybcio <konrad.dybcio@linaro.org>
To: Andy Gross <agross@kernel.org>,
	Bjorn Andersson <andersson@kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Manivannan Sadhasivam <mani@kernel.org>,
	"Borislav Petkov (AMD)" <bp@alien8.de>
Cc: Marijn Suijten <marijn.suijten@somainline.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	Konrad Dybcio <konrad.dybcio@linaro.org>
Subject: [PATCH 1/2] dt-bindings: cache: qcom,llcc: Fix SM8550 description
Date: Wed, 17 May 2023 04:18:49 +0200	[thread overview]
Message-ID: <20230517-topic-kailua-llcc-v1-1-d57bd860c43e@linaro.org> (raw)
In-Reply-To: <20230517-topic-kailua-llcc-v1-0-d57bd860c43e@linaro.org>

SM8550 (LLCCv4.1) has 4 register regions, this was not described
between its addition and the restructurization that happened in
the commit referenced in the fixes tag.

Fix it.

Fixes: 43aa006e074c ("dt-bindings: arm: msm: Fix register regions used for LLCC banks")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
 Documentation/devicetree/bindings/cache/qcom,llcc.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
index d8b91944180a..44892aa589fd 100644
--- a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
+++ b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
@@ -129,6 +129,7 @@ allOf:
               - qcom,sm8250-llcc
               - qcom,sm8350-llcc
               - qcom,sm8450-llcc
+              - qcom,sm8550-llcc
     then:
       properties:
         reg:

-- 
2.40.1


  reply	other threads:[~2023-05-17  2:19 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-17  2:18 [PATCH 0/2] Fix SM8550 LLCC Konrad Dybcio
2023-05-17  2:18 ` Konrad Dybcio [this message]
2023-05-17  5:44   ` [PATCH 1/2] dt-bindings: cache: qcom,llcc: Fix SM8550 description Manivannan Sadhasivam
2023-05-17 13:20     ` Konrad Dybcio
2023-05-17  7:52   ` Krzysztof Kozlowski
2023-05-17  8:46   ` Krzysztof Kozlowski
2023-05-17  2:18 ` [PATCH 2/2] arm64: dts: qcom: sm8550: Use the correct LLCC register scheme Konrad Dybcio
2023-05-17  5:47   ` Manivannan Sadhasivam
2023-05-25  4:53 ` (subset) [PATCH 0/2] Fix SM8550 LLCC Bjorn Andersson

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