From: Jisheng Zhang <jszhang@kernel.org>
To: Thomas Gleixner <tglx@linutronix.de>,
Marc Zyngier <maz@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Jiri Slaby <jirislaby@kernel.org>
Cc: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
devicetree@vger.kernel.org, linux-serial@vger.kernel.org,
Conor Dooley <conor.dooley@microchip.com>,
Palmer Dabbelt <palmer@rivosinc.com>
Subject: [PATCH v4 09/10] MAINTAINERS: riscv: add entry for Bouffalolab SoC
Date: Thu, 18 May 2023 23:22:43 +0800 [thread overview]
Message-ID: <20230518152244.2178-10-jszhang@kernel.org> (raw)
In-Reply-To: <20230518152244.2178-1-jszhang@kernel.org>
Add Jisheng Zhang as Bouffalolab SoC maintainer.
Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
---
MAINTAINERS | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index e0ad886d3163..0ae136f2656f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -18115,6 +18115,13 @@ F: arch/riscv/
N: riscv
K: riscv
+RISC-V BOUFFALOLAB SOC SUPPORT
+M: Jisheng Zhang <jszhang@kernel.org>
+L: linux-riscv@lists.infradead.org
+S: Maintained
+F: arch/riscv/boot/dts/bouffalolab/
+F: drivers/tty/serial/bflb_uart.c
+
RISC-V MICROCHIP FPGA SUPPORT
M: Conor Dooley <conor.dooley@microchip.com>
M: Daire McNamara <daire.mcnamara@microchip.com>
--
2.40.0
next prev parent reply other threads:[~2023-05-18 15:35 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-18 15:22 [PATCH v4 00/10] riscv: add Bouffalolab bl808 support Jisheng Zhang
2023-05-18 15:22 ` [PATCH v4 01/10] dt-bindings: vendor-prefixes: add bouffalolab Jisheng Zhang
2023-05-19 2:53 ` Samuel Holland
2023-05-21 9:02 ` Jisheng Zhang
2023-05-21 13:55 ` Conor Dooley
2023-06-07 19:50 ` Rob Herring
2023-05-18 15:22 ` [PATCH v4 02/10] dt-bindings: interrupt-controller: Add bouffalolab bl808 plic Jisheng Zhang
2023-05-19 3:36 ` Samuel Holland
2023-05-18 15:22 ` [PATCH v4 03/10] dt-bindings: serial: add documentation for Bouffalolab UART Driver Jisheng Zhang
2023-05-18 19:34 ` Conor Dooley
2023-05-19 3:00 ` Samuel Holland
2023-05-21 9:13 ` Jisheng Zhang
2023-05-22 7:13 ` Conor Dooley
2023-05-18 15:22 ` [PATCH v4 04/10] serial: bflb_uart: add " Jisheng Zhang
2023-05-30 10:36 ` Greg Kroah-Hartman
2023-05-31 14:09 ` Jisheng Zhang
2023-05-31 14:34 ` Greg Kroah-Hartman
2023-05-31 15:05 ` Jisheng Zhang
2023-05-18 15:22 ` [PATCH v4 05/10] riscv: add the Bouffalolab SoC family Kconfig option Jisheng Zhang
2023-05-18 15:22 ` [PATCH v4 06/10] dt-bindings: riscv: Add bouffalolab bl808 board compatibles Jisheng Zhang
2023-05-19 3:31 ` Samuel Holland
2023-05-19 11:55 ` Conor Dooley
2023-05-21 9:29 ` Jisheng Zhang
2023-05-21 9:45 ` Jisheng Zhang
2023-06-07 20:04 ` Rob Herring
2023-05-18 15:22 ` [PATCH v4 07/10] riscv: dts: bouffalolab: add the bl808 SoC base device tree Jisheng Zhang
2023-05-19 3:51 ` Samuel Holland
2023-05-18 15:22 ` [PATCH v4 08/10] riscv: dts: bouffalolab: add Sipeed M1s SoM and Dock devicetree Jisheng Zhang
2023-05-19 3:55 ` Samuel Holland
2023-05-21 9:40 ` Jisheng Zhang
2023-05-18 15:22 ` Jisheng Zhang [this message]
2023-05-18 15:22 ` [PATCH v4 10/10] riscv: defconfig: enable BOUFFALOLAB SoC Jisheng Zhang
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