From: Shawn Guo <shawnguo@kernel.org>
To: Hugo Villeneuve <hugo@hugovil.com>
Cc: Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
NXP Linux Team <linux-imx@nxp.com>,
Hugo Villeneuve <hvilleneuve@dimonoff.com>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] arm64: dts: imx8mn-var-som-symphony: adapt FEC pinctrl for SOMs with onboard PHY
Date: Sun, 4 Jun 2023 20:51:18 +0800 [thread overview]
Message-ID: <20230604125118.GM4199@dragon> (raw)
In-Reply-To: <20230529193525.1034378-1-hugo@hugovil.com>
On Mon, May 29, 2023 at 03:35:26PM -0400, Hugo Villeneuve wrote:
> From: Hugo Villeneuve <hvilleneuve@dimonoff.com>
>
> The VAR SOM symphony carrier board can be used with SOMs which have a
> soldered ethernet PHY onboard and with SOMs which don't have one.
>
> For SOMs with an onboard PHY, the PHY on the cartrier board is not
> used, and GPIO1_IO9 is used as a reset line to the onboard PHY.
>
> For SOMs without an onboard PHY, the PHY on the carrier board is
> used. For this configuration, pca9534 GPIO 5 (located on the carrier
> board) is used as a reset line to the PHY, and GPIO1_IO9 is not
> used.
>
> GPIO1_IO9 is not connected to any user-accessible pins or functions,
> and leaving it enabled in the mux pinctrl for both configurations is
> safe.
>
> Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Applied, thanks!
prev parent reply other threads:[~2023-06-04 12:51 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-29 19:35 [PATCH] arm64: dts: imx8mn-var-som-symphony: adapt FEC pinctrl for SOMs with onboard PHY Hugo Villeneuve
2023-06-04 12:51 ` Shawn Guo [this message]
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