[PATCH 1/2] PCI: of: update max-link-speed for gen5 links

[PATCH 1/2] PCI: of: update max-link-speed for gen5 links

[Ben Dooks]

From: Ben Dooks <ben.dooks@sifive.com>

Update max-link-speed to be up to 6, for newer systems that could have
up to gen6 pci describe in device-tree.

Signed-off-by: Ben Dooks <ben.dooks@sifive.com>
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
---
 drivers/pci/of.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/of.c b/drivers/pci/of.c
index 2c25f4fa0225..da0cc01e923e 100644
--- a/drivers/pci/of.c
+++ b/drivers/pci/of.c
@@ -639,7 +639,7 @@ int of_pci_get_max_link_speed(struct device_node *node)
 	u32 max_link_speed;
 
 	if (of_property_read_u32(node, "max-link-speed", &max_link_speed) ||
-	    max_link_speed == 0 || max_link_speed > 4)
+	    max_link_speed == 0 || max_link_speed > 6)
 		return -EINVAL;
 
 	return max_link_speed;
-- 
2.39.2

[PATCH 2/2] dt-bindings: updated max-link-speed for newer generations

[Ben Dooks]

Add updated max-link-speed values for newer generation PCIe link
speeds.

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: devicetree@vger.kernel.org
---
 Documentation/devicetree/bindings/pci/pci.txt | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/pci/pci.txt b/Documentation/devicetree/bindings/pci/pci.txt
index 6a8f2874a24d..56391e193fc4 100644
--- a/Documentation/devicetree/bindings/pci/pci.txt
+++ b/Documentation/devicetree/bindings/pci/pci.txt
@@ -22,8 +22,9 @@ driver implementation may support the following properties:
    If present this property specifies PCI gen for link capability.  Host
    drivers could add this as a strategy to avoid unnecessary operation for
    unsupported link speed, for instance, trying to do training for
-   unsupported link speed, etc.  Must be '4' for gen4, '3' for gen3, '2'
-   for gen2, and '1' for gen1. Any other values are invalid.
+   unsupported link speed, etc.  Must be '6' for gen6,  '5' for gen5,
+   '4' for gen4, '3' for gen3, '2' for gen2, and '1' for gen1.
+   Any other values are invalid.
 - reset-gpios:
    If present this property specifies PERST# GPIO. Host drivers can parse the
    GPIO and apply fundamental reset to endpoints.
-- 
2.39.2

Re: [PATCH 2/2] dt-bindings: updated max-link-speed for newer generations

[Conor Dooley]

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On Wed, May 31, 2023 at 10:21:21AM +0100, Ben Dooks wrote:
> Add updated max-link-speed values for newer generation PCIe link
> speeds.

Acked-by: Conor Dooley <conor.dooley@microchip.com>

Cheers,
Conor.

> 
> Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
> Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
> Cc: devicetree@vger.kernel.org
> ---
>  Documentation/devicetree/bindings/pci/pci.txt | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/pci/pci.txt b/Documentation/devicetree/bindings/pci/pci.txt
> index 6a8f2874a24d..56391e193fc4 100644
> --- a/Documentation/devicetree/bindings/pci/pci.txt
> +++ b/Documentation/devicetree/bindings/pci/pci.txt
> @@ -22,8 +22,9 @@ driver implementation may support the following properties:
>     If present this property specifies PCI gen for link capability.  Host
>     drivers could add this as a strategy to avoid unnecessary operation for
>     unsupported link speed, for instance, trying to do training for
> -   unsupported link speed, etc.  Must be '4' for gen4, '3' for gen3, '2'
> -   for gen2, and '1' for gen1. Any other values are invalid.
> +   unsupported link speed, etc.  Must be '6' for gen6,  '5' for gen5,
> +   '4' for gen4, '3' for gen3, '2' for gen2, and '1' for gen1.
> +   Any other values are invalid.
>  - reset-gpios:
>     If present this property specifies PERST# GPIO. Host drivers can parse the
>     GPIO and apply fundamental reset to endpoints.
> -- 
> 2.39.2
> 

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Re: [PATCH 2/2] dt-bindings: updated max-link-speed for newer generations

[Rob Herring]

On Wed, May 31, 2023 at 10:21:21AM +0100, Ben Dooks wrote:
> Add updated max-link-speed values for newer generation PCIe link
> speeds.
> 
> Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
> Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
> Cc: devicetree@vger.kernel.org
> ---
>  Documentation/devicetree/bindings/pci/pci.txt | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/pci/pci.txt b/Documentation/devicetree/bindings/pci/pci.txt
> index 6a8f2874a24d..56391e193fc4 100644
> --- a/Documentation/devicetree/bindings/pci/pci.txt
> +++ b/Documentation/devicetree/bindings/pci/pci.txt
> @@ -22,8 +22,9 @@ driver implementation may support the following properties:
>     If present this property specifies PCI gen for link capability.  Host
>     drivers could add this as a strategy to avoid unnecessary operation for
>     unsupported link speed, for instance, trying to do training for
> -   unsupported link speed, etc.  Must be '4' for gen4, '3' for gen3, '2'
> -   for gen2, and '1' for gen1. Any other values are invalid.
> +   unsupported link speed, etc.  Must be '6' for gen6,  '5' for gen5,
> +   '4' for gen4, '3' for gen3, '2' for gen2, and '1' for gen1.
> +   Any other values are invalid.

This file is a deadend to be removed.

Please update dtschema with the new values.

Rob

Re: [PATCH 2/2] dt-bindings: updated max-link-speed for newer generations

[Ben Dooks]

On 31/05/2023 20:02, Bjorn Helgaas wrote:
> Possible subject:
> 
>    dt-bindings: Add gen5, gen6 max-link-speed values
> 
> On Wed, May 31, 2023 at 10:21:21AM +0100, Ben Dooks wrote:
>> Add updated max-link-speed values for newer generation PCIe link
>> speeds.
>>
>> Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
>> Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
>> Cc: devicetree@vger.kernel.org
>> ---
>>   Documentation/devicetree/bindings/pci/pci.txt | 5 +++--
>>   1 file changed, 3 insertions(+), 2 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/pci/pci.txt b/Documentation/devicetree/bindings/pci/pci.txt
>> index 6a8f2874a24d..56391e193fc4 100644
>> --- a/Documentation/devicetree/bindings/pci/pci.txt
>> +++ b/Documentation/devicetree/bindings/pci/pci.txt
>> @@ -22,8 +22,9 @@ driver implementation may support the following properties:
>>      If present this property specifies PCI gen for link capability.  Host
>>      drivers could add this as a strategy to avoid unnecessary operation for
>>      unsupported link speed, for instance, trying to do training for
>> -   unsupported link speed, etc.  Must be '4' for gen4, '3' for gen3, '2'
>> -   for gen2, and '1' for gen1. Any other values are invalid.
>> +   unsupported link speed, etc.  Must be '6' for gen6,  '5' for gen5,
>> +   '4' for gen4, '3' for gen3, '2' for gen2, and '1' for gen1.
>> +   Any other values are invalid.
> 
> I really wish we'd used values with some connection to the actual
> speed, e.g., "16" for 16 GT/s.  These "gen X" values are a real hassle
> to convert back to the speed.  But I guess that's water under the
> bridge.
> 
> Maybe we should annotate the documentation here, though, e.g.,
> 
>    '6' for gen6 (64.0 GT/s), '5' for gen5 (32.0 GT/s), ...
> 
> Do I have that right?  I don't see "gen5" etc in the specs themselves,
> so this is just based on Google.
> 
> Bjorn 

I checked the wikipedia, I've been working on a yet-to-be-released
device that uses a gen5 phy so updating this would be useful.

-- 
Ben Dooks				http://www.codethink.co.uk/
Senior Engineer				Codethink - Providing Genius

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