From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Andy Gross <agross@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konrad.dybcio@linaro.org>,
Ilia Lin <ilia.lin@kernel.org>, Viresh Kumar <vireshk@kernel.org>,
Nishanth Menon <nm@ti.com>, Stephen Boyd <sboyd@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
"Rafael J. Wysocki" <rafael@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-pm@vger.kernel.org, linux-clk@vger.kernel.org,
Christian Marangi <ansuelsmth@gmail.com>
Subject: [PATCH 09/18] cpufreq: qcom-nvmem: Add support for voltage scaling
Date: Mon, 12 Jun 2023 08:39:13 +0300 [thread overview]
Message-ID: <20230612053922.3284394-10-dmitry.baryshkov@linaro.org> (raw)
In-Reply-To: <20230612053922.3284394-1-dmitry.baryshkov@linaro.org>
If requested by the platform, scale voltages according to data specified
in the OPP tables.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/cpufreq/qcom-cpufreq-nvmem.c | 115 ++++++++++++++++++++++++++-
1 file changed, 114 insertions(+), 1 deletion(-)
diff --git a/drivers/cpufreq/qcom-cpufreq-nvmem.c b/drivers/cpufreq/qcom-cpufreq-nvmem.c
index fee9736f7326..18d6e6ed1bd0 100644
--- a/drivers/cpufreq/qcom-cpufreq-nvmem.c
+++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c
@@ -26,6 +26,7 @@
#include <linux/platform_device.h>
#include <linux/pm_domain.h>
#include <linux/pm_opp.h>
+#include <linux/regulator/consumer.h>
#include <linux/slab.h>
#include <linux/soc/qcom/smem.h>
@@ -39,6 +40,7 @@ struct qcom_cpufreq_match_data {
char **pvs_name,
struct qcom_cpufreq_drv *drv);
const char **genpd_names;
+ const char * const *regulator_names;
};
struct qcom_cpufreq_drv {
@@ -218,6 +220,110 @@ static const struct qcom_cpufreq_match_data match_data_qcs404 = {
.genpd_names = qcs404_genpd_names,
};
+#define NUM_SUPPLIES 2
+static int qcom_cpufreq_config_regulators(struct device *dev,
+ struct dev_pm_opp *old_opp,
+ struct dev_pm_opp *new_opp,
+ struct regulator **regulators,
+ unsigned int count)
+{
+ struct dev_pm_opp_supply supplies[NUM_SUPPLIES];
+ unsigned long old_freq, freq;
+ unsigned int i;
+ int ret;
+
+ if (WARN_ON_ONCE(count != NUM_SUPPLIES))
+ return -EINVAL;
+
+ ret = dev_pm_opp_get_supplies(new_opp, supplies);
+ if (WARN_ON(ret))
+ return ret;
+
+ old_freq = dev_pm_opp_get_freq(old_opp);
+ freq = dev_pm_opp_get_freq(new_opp);
+
+ WARN_ON(!old_freq || !freq);
+ if (freq > old_freq) {
+ for (i = 0; i < count; i++) {
+ struct regulator *reg = regulators[i];
+ struct dev_pm_opp_supply *supply = &supplies[i];
+
+ dev_dbg(dev, "%s: voltages (mV): %lu %lu %lu\n", __func__,
+ supply->u_volt_min, supply->u_volt, supply->u_volt_max);
+
+ ret = regulator_set_voltage_triplet(reg,
+ supply->u_volt_min,
+ supply->u_volt,
+ supply->u_volt_max);
+ if (ret) {
+ dev_err(dev, "%s: failed to set voltage (%lu %lu %lu mV): %d\n",
+ __func__, supply->u_volt_min, supply->u_volt,
+ supply->u_volt_max, ret);
+ goto restore_backwards;
+ }
+ }
+ } else {
+ for (i = count; i > 0; i--) {
+ struct regulator *reg = regulators[i - 1];
+ struct dev_pm_opp_supply *supply = &supplies[i - 1];
+
+ dev_dbg(dev, "%s: voltages (mV): %lu %lu %lu\n", __func__,
+ supply->u_volt_min, supply->u_volt, supply->u_volt_max);
+
+ ret = regulator_set_voltage_triplet(reg,
+ supply->u_volt_min,
+ supply->u_volt,
+ supply->u_volt_max);
+ if (ret) {
+ dev_err(dev, "%s: failed to set voltage (%lu %lu %lu mV): %d\n",
+ __func__, supply->u_volt_min, supply->u_volt,
+ supply->u_volt_max, ret);
+ goto restore_forward;
+ }
+ }
+ }
+
+ return 0;
+
+restore_backwards:
+
+ dev_pm_opp_get_supplies(old_opp, supplies);
+
+ for (; i > 0; i--) {
+ struct regulator *reg = regulators[i - 1];
+ struct dev_pm_opp_supply *supply = &supplies[i - 1];
+
+ dev_dbg(dev, "%s: voltages (mV): %lu %lu %lu\n", __func__,
+ supply->u_volt_min, supply->u_volt, supply->u_volt_max);
+
+ regulator_set_voltage_triplet(reg,
+ supply->u_volt_min,
+ supply->u_volt,
+ supply->u_volt_max);
+ }
+
+ return ret;
+
+restore_forward:
+
+ dev_pm_opp_get_supplies(old_opp, supplies);
+
+ for ( ; i < count; i++) {
+ struct regulator *reg = regulators[i];
+ struct dev_pm_opp_supply *supply = &supplies[i];
+
+ dev_dbg(dev, "%s: voltages (mV): %lu %lu %lu\n", __func__,
+ supply->u_volt_min, supply->u_volt, supply->u_volt_max);
+
+ regulator_set_voltage_triplet(reg,
+ supply->u_volt_min,
+ supply->u_volt,
+ supply->u_volt_max);
+ }
+
+ return ret;
+}
+
static int qcom_cpufreq_probe(struct platform_device *pdev)
{
struct qcom_cpufreq_drv *drv;
@@ -305,7 +411,14 @@ static int qcom_cpufreq_probe(struct platform_device *pdev)
config.virt_devs = NULL;
}
- if (config.supported_hw || config.genpd_names) {
+ if (drv->data->regulator_names) {
+ config.config_regulators = qcom_cpufreq_config_regulators;
+ config.regulator_names = drv->data->regulator_names;
+ }
+
+ if (config.supported_hw ||
+ config.genpd_names ||
+ config.regulator_names) {
drv->opp_tokens[cpu] = dev_pm_opp_set_config(cpu_dev, &config);
if (drv->opp_tokens[cpu] < 0) {
ret = drv->opp_tokens[cpu];
--
2.39.2
next prev parent reply other threads:[~2023-06-12 5:40 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-12 5:39 [PATCH 00/18] ARM: qcom: apq8064: support CPU frequency scaling Dmitry Baryshkov
2023-06-11 16:27 ` Christian Marangi
2023-06-12 14:20 ` Dmitry Baryshkov
2023-06-13 16:19 ` Christian Marangi
2023-06-14 20:18 ` Dmitry Baryshkov
2023-06-12 5:39 ` [PATCH 01/18] dt-bindings: opp: opp-v2-kryo-cpu: support Qualcomm Krait SoCs Dmitry Baryshkov
2023-06-14 16:01 ` Krzysztof Kozlowski
2023-06-14 20:11 ` Dmitry Baryshkov
2023-06-21 8:51 ` Krzysztof Kozlowski
2023-06-12 5:39 ` [PATCH 02/18] dt-bindings: soc: qcom: merge qcom,saw2.txt into qcom,spm.yaml Dmitry Baryshkov
2023-06-14 16:03 ` Krzysztof Kozlowski
2023-06-12 5:39 ` [PATCH 03/18] dt-bindings: soc: qcom: qcom,saw2: define optional regulator node Dmitry Baryshkov
2023-06-14 16:05 ` Krzysztof Kozlowski
2023-06-14 22:49 ` Dmitry Baryshkov
2023-06-21 8:46 ` Krzysztof Kozlowski
2023-06-12 5:39 ` [PATCH 04/18] dt-bindings: clock: qcom,krait-cc: Krait core clock controller Dmitry Baryshkov
[not found] ` <3ce1bd9b0cb23e4e60b093327e705d69.sboyd@kernel.org>
2023-06-12 22:33 ` Dmitry Baryshkov
2023-06-12 5:39 ` [PATCH 05/18] clk: qcom: krait-cc: rewrite driver to use clk_hw instead of clk Dmitry Baryshkov
2023-06-12 5:39 ` [PATCH 06/18] clk: qcom: krait-cc: export L2 clock as an interconnect Dmitry Baryshkov
2023-06-12 5:39 ` [PATCH 07/18] soc: qcom: spm: add support for voltage regulator Dmitry Baryshkov
2023-06-12 5:39 ` [PATCH 08/18] cpufreq: qcom-nvmem: also accept operating-points-v2-krait-cpu Dmitry Baryshkov
2023-06-12 5:39 ` Dmitry Baryshkov [this message]
2023-06-12 5:39 ` [PATCH 10/18] cpufreq: qcom-nvmem: drop pvs_ver for format a fuses Dmitry Baryshkov
2023-06-12 5:39 ` [PATCH 11/18] cpufreq: qcom-nvmem: provide separate configuration data for apq8064 Dmitry Baryshkov
2023-06-12 5:39 ` [PATCH 12/18] ARM: dts: qcom: apq8064: rename SAW nodes to power-manager Dmitry Baryshkov
2023-06-12 5:39 ` [PATCH 13/18] ARM: dts: qcom: apq8064: declare SAW2 regulators Dmitry Baryshkov
2023-06-12 5:39 ` [PATCH 14/18] ARM: dts: qcom: apq8064: add simple CPUFreq support Dmitry Baryshkov
2023-06-12 5:39 ` [PATCH 15/18] ARM: dts: qcom: apq8064: provide voltage scaling tables Dmitry Baryshkov
2023-06-12 9:01 ` Stephan Gerhold
2023-06-12 13:33 ` Dmitry Baryshkov
2023-06-11 22:16 ` Christian Marangi
2023-06-12 13:59 ` Stephan Gerhold
2023-06-12 15:38 ` Dmitry Baryshkov
2023-06-12 5:39 ` [PATCH 16/18] ARM: dts: qcom: apq8064: enable passive CPU cooling Dmitry Baryshkov
2023-06-12 5:39 ` [PATCH 17/18] ARM: dts: qcom: apq8064-asus-nexus7-flo: constraint cpufreq regulators Dmitry Baryshkov
2023-06-12 5:39 ` [PATCH 18/18] ARM: dts: qcom: apq8064-ifc6410: " Dmitry Baryshkov
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230612053922.3284394-10-dmitry.baryshkov@linaro.org \
--to=dmitry.baryshkov@linaro.org \
--cc=agross@kernel.org \
--cc=andersson@kernel.org \
--cc=ansuelsmth@gmail.com \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=ilia.lin@kernel.org \
--cc=konrad.dybcio@linaro.org \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-pm@vger.kernel.org \
--cc=mturquette@baylibre.com \
--cc=nm@ti.com \
--cc=rafael@kernel.org \
--cc=robh+dt@kernel.org \
--cc=sboyd@kernel.org \
--cc=vireshk@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).