From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A6176EB64DA for ; Tue, 13 Jun 2023 19:17:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229472AbjFMTRu (ORCPT ); Tue, 13 Jun 2023 15:17:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58550 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229674AbjFMTRt (ORCPT ); Tue, 13 Jun 2023 15:17:49 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BA1FEC6; Tue, 13 Jun 2023 12:17:48 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 4DC3F63A09; Tue, 13 Jun 2023 19:17:48 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 48515C433F1; Tue, 13 Jun 2023 19:17:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1686683867; bh=oD280Kq4hv47N+S/pekjBlHMpeiY3mor5pFjsES0eBU=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=GFaMCiooc9xqA+b6v8Ydxm4bW3t48zVN7o+ZLd9NGw0ecZInTVWNcNVsWdohpUWeo 7gyZ+f7Fvo+wbFePOydPko9zAxcfOd9DIrYPdthKHDBIeCVt4ky2Ij8rwjLsNHQubN xD8g7S9oYJDWPtaqKcvrJQuI2BM5Th+SNP49XhZ/8Odl42JApkWMPYNhpk7Ew8WaDY EG8c8EXeDjvhfvXO1CRLI6P6m0PV9kVbx1JOM/88yXzfkbaRfxamz9PEnqw/v4zPYN pU+F39Ep5YJVdAkMNbgHDVeg1/P0gISYAIbp2N+sQCLKy/NZxNoWjLI7j3YTD/Bkk9 RImaTm1CyiEPA== Date: Tue, 13 Jun 2023 20:17:41 +0100 From: Conor Dooley To: Krzysztof Kozlowski Cc: Xingyu Wu , linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Philipp Zabel , Conor Dooley , Emil Renner Berthing , Paul Walmsley , Palmer Dabbelt , Albert Ou , Hal Feng , William Qiu , linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Subject: Re: [PATCH v5 3/7] dt-bindings: clock: jh7110-syscrg: Add PLL clock inputs Message-ID: <20230613-vessel-gallantly-d8c7393c9aca@spud> References: <20230613125852.211636-1-xingyu.wu@starfivetech.com> <20230613125852.211636-4-xingyu.wu@starfivetech.com> <75508c4d-d86e-f88f-191f-dd870ebe7bd7@linaro.org> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="4FpC5bN6KyvzAt5G" Content-Disposition: inline In-Reply-To: <75508c4d-d86e-f88f-191f-dd870ebe7bd7@linaro.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org --4FpC5bN6KyvzAt5G Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Tue, Jun 13, 2023 at 08:34:25PM +0200, Krzysztof Kozlowski wrote: > On 13/06/2023 14:58, Xingyu Wu wrote: > > Add optional PLL clock inputs from PLL clock generator. >=20 > Are you sure that PLLs are optional? Usually they are not... They're not. What's happening here is the original binding was defined without these clocks (obviously, since they're only being added now) so for the driver they are still "optional" to keep compatibility. In mainline, the driver takes the "osc" input and registers some fixed-factor clocks to mimic these PLLs & after this patchset that is only done as a fallback if the clock inputs to the clock controller, =66rom the PLLs, are missing. They should not be optional in the dt-binding because they're not optional in the hardware afaik! Cheers, Conor. --4FpC5bN6KyvzAt5G Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZIjA1QAKCRB4tDGHoIJi 0olYAQCUKGw49UtQ9fn/beKhbR7EyT1pRj5cgqbV4cYpDu9U9AEAqbt+eklBEBlT /UHn1MIfOjSf0NW68hlORp8JzD6gSgw= =aTi3 -----END PGP SIGNATURE----- --4FpC5bN6KyvzAt5G--