From: Conor Dooley <conor.dooley@microchip.com>
To: Eric Lin <eric.lin@sifive.com>
Cc: <conor@kernel.org>, <robh+dt@kernel.org>,
<krzysztof.kozlowski+dt@linaro.org>, <palmer@dabbelt.com>,
<paul.walmsley@sifive.com>, <aou@eecs.berkeley.edu>,
<maz@kernel.org>, <chenhuacai@kernel.org>,
<baolu.lu@linux.intel.com>, <will@kernel.org>,
<kan.liang@linux.intel.com>, <nnac123@linux.ibm.com>,
<pierre.gondois@arm.com>, <huangguangbin2@huawei.com>,
<jgross@suse.com>, <chao.gao@intel.com>, <maobibo@loongson.cn>,
<linux-riscv@lists.infradead.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <dslin1010@gmail.com>,
Greentime Hu <greentime.hu@sifive.com>,
Zong Li <zong.li@sifive.com>, Nick Hu <nick.hu@sifive.com>
Subject: Re: [PATCH 2/3] soc: sifive: Add SiFive private L2 cache PMU driver
Date: Fri, 16 Jun 2023 11:12:57 +0100 [thread overview]
Message-ID: <20230616-revision-speed-a83dc926b334@wendy> (raw)
In-Reply-To: <20230616063210.19063-3-eric.lin@sifive.com>
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On Fri, Jun 16, 2023 at 02:32:09PM +0800, Eric Lin wrote:
> From: Greentime Hu <greentime.hu@sifive.com>
>
> This adds SiFive private L2 cache PMU driver. User
> can use perf tool to profile by event name and event id.
>
> Example:
> $ perf stat -C 0 -e /sifive_pl2_pmu/inner_acquire_block_btot/
> -e /sifive_pl2_pmu/inner_acquire_block_ntob/
> -e /sifive_pl2_pmu/inner_acquire_block_ntot/ ls
>
> Performance counter stats for 'CPU(s) 0':
>
> 300 sifive_pl2_pmu/inner_acquire_block_btot/
> 17801 sifive_pl2_pmu/inner_acquire_block_ntob/
> 5253 sifive_pl2_pmu/inner_acquire_block_ntot/
>
> 0.088917326 seconds time elapsed
>
> $ perf stat -C 0 -e /sifive_pl2_pmu/event=0x10001/
> -e /sifive_pl2_pmu/event=0x4001/
> -e /sifive_pl2_pmu/event=0x8001/ ls
>
> Performance counter stats for 'CPU(s) 0':
>
> 251 sifive_pl2_pmu/event=0x10001/
> 2620 sifive_pl2_pmu/event=0x4001/
> 644 sifive_pl2_pmu/event=0x8001/
>
> 0.092827110 seconds time elapsed
>
> Signed-off-by: Greentime Hu <greentime.hu@sifive.com>
> Signed-off-by: Eric Lin <eric.lin@sifive.com>
> Reviewed-by: Zong Li <zong.li@sifive.com>
> Reviewed-by: Nick Hu <nick.hu@sifive.com>
> ---
> drivers/soc/sifive/Kconfig | 9 +
> drivers/soc/sifive/Makefile | 1 +
> drivers/soc/sifive/sifive_pl2.h | 20 +
> drivers/soc/sifive/sifive_pl2_cache.c | 16 +
> drivers/soc/sifive/sifive_pl2_pmu.c | 669 ++++++++++++++++++++++++++
Perf drivers should be in drivers/perf, no?
Cheers,
Conor.
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next prev parent reply other threads:[~2023-06-16 10:13 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-16 6:32 [PATCH 0/3] Add SiFive Private L2 cache and PMU driver Eric Lin
2023-06-16 6:32 ` [PATCH 1/3] soc: sifive: Add SiFive private L2 cache support Eric Lin
2023-06-16 8:30 ` Ben Dooks
2023-06-23 8:21 ` Eric Lin
2023-06-16 19:02 ` Christophe JAILLET
2023-06-23 8:28 ` Eric Lin
2023-06-16 21:05 ` Conor Dooley
2023-06-23 9:49 ` Eric Lin
2023-06-16 6:32 ` [PATCH 2/3] soc: sifive: Add SiFive private L2 cache PMU driver Eric Lin
2023-06-16 10:12 ` Conor Dooley [this message]
2023-06-20 3:14 ` Eric Lin
2023-06-21 15:17 ` Conor Dooley
2023-06-23 13:24 ` Will Deacon
2023-06-23 16:03 ` Eric Lin
2023-07-11 8:41 ` Ben Dooks
2023-06-16 19:05 ` Christophe JAILLET
2023-06-16 6:32 ` [PATCH 3/3] dt-bindings: riscv: sifive: Add SiFive Private L2 cache controller Eric Lin
2023-06-16 10:10 ` Conor Dooley
2023-06-16 10:37 ` Ben Dooks
2023-06-26 3:06 ` Eric Lin
2023-06-16 10:45 ` Krzysztof Kozlowski
2023-06-26 3:26 ` Eric Lin
2023-06-26 6:19 ` Krzysztof Kozlowski
2023-06-28 16:31 ` Eric Lin
2023-07-01 8:22 ` Krzysztof Kozlowski
2023-07-12 11:09 ` Eric Lin
2023-07-12 12:30 ` Krzysztof Kozlowski
2023-07-12 12:48 ` Conor Dooley
2023-07-20 10:16 ` Eric Lin
2023-07-20 9:49 ` Eric Lin
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