From: Pankaj Gupta <pankaj.gupta@nxp.com>
To: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
conor+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de,
kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
gaurav.jain@nxp.com, linux-kernel@vger.kernel.org
Cc: Pankaj Gupta <pankaj.gupta@nxp.com>
Subject: [PATCH v3 1/7] dt-bindings: arm: fsl: add mu binding doc
Date: Fri, 16 Jun 2023 23:41:38 +0530 [thread overview]
Message-ID: <20230616181144.646500-2-pankaj.gupta@nxp.com> (raw)
In-Reply-To: <20230616181144.646500-1-pankaj.gupta@nxp.com>
The NXP i.MX Message Unit enables two processing elements
to communicate & co-ordinate with each other. This driver
is used to communicate between Application Core and
NXP HSM IPs like NXP EdgeLock Enclave etc.
It exists on some i.MX processors. e.g. i.MX8ULP, i.MX93 etc.
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
---
.../bindings/arm/freescale/fsl,ele_mu.yaml | 144 ++++++++++++++++++
1 file changed, 144 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,ele_mu.yaml
diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,ele_mu.yaml b/Documentation/devicetree/bindings/arm/freescale/fsl,ele_mu.yaml
new file mode 100644
index 000000000000..29e309a88899
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/freescale/fsl,ele_mu.yaml
@@ -0,0 +1,144 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/freescale/fsl,ele_mu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP i.MX EdgeLock Enclave MUAP driver
+
+maintainers:
+ - Pankaj Gupta <pankaj.gupta@nxp.com>
+
+description: |
+
+ NXP i.MX EdgeLock Enclave Message Unit Driver.
+ The Messaging Unit module enables two processing elements within the SoC to
+ communicate and coordinate by passing messages (e.g., data, status and control)
+ through its interfaces.
+
+ The NXP i.MX EdgeLock Enclave Message Unit (ELE-MUAP) is specifically targeted
+ for use between application core and Edgelocke Enclave. It allows to send
+ messages to the EL Enclave using a shared mailbox.
+
+ The messages must follow the protocol defined.
+
+ Non-Secure + Secure
+ |
+ |
+ +---------+ +-------------+ |
+ | ele_mu.c+<---->+imx-mailbox.c| |
+ | | | mailbox.c +<-->+------+ +------+
+ +---+-----+ +-------------+ | MU X +<-->+ ELE |
+ | +------+ +------+
+ +----------------+ |
+ | | |
+ v v |
+ logical logical |
+ receiver waiter |
+ + + |
+ | | |
+ | | |
+ | +----+------+ |
+ | | | |
+ | | | |
+ device_ctx device_ctx device_ctx |
+ |
+ User 0 User 1 User Y |
+ +------+ +------+ +------+ |
+ |misc.c| |misc.c| |misc.c| |
+ kernel space +------+ +------+ +------+ |
+ |
+ +------------------------------------------------------ |
+ | | | |
+ userspace /dev/ele_muXch0 | | |
+ /dev/ele_muXch1 | |
+ /dev/ele_muXchY |
+ |
+
+ When a user sends a command to the ELE, it registers its device_ctx as
+ waiter of a response from ELE.
+
+ A user can be registered as receiver of command from the ELE.
+ Create char devices in /dev as channels of the form /dev/ele_muXchY with X
+ the id of the driver and Y for each users. It allows to send and receive
+ messages to the NXP EdgeLock Enclave IP on NXP SoC, where current possible
+ value, i.e., supported SoC(s) are imx8ulp, imx93.
+
+properties:
+ compatible:
+ enum:
+ - fsl,imx-ele
+ - fsl,imx93-ele
+
+ mboxes:
+ description:
+ A list of phandles of TX MU channels followed by a list of phandles of
+ RX MU channels. The number of expected tx and rx channels is 1 TX, and
+ 1 RX channels. All MU channels must be within the same MU instance.
+ Cross instances are not allowed. The MU instance to be used is S4MUAP
+ for imx8ulp & imx93. Users need to ensure that used MU instance does not
+ conflict with other execution environments.
+ items:
+ - description: TX0 MU channel
+ - description: RX0 MU channel
+
+ mbox-names:
+ items:
+ - const: tx
+ - const: rx
+
+ fsl,ele_mu_did:
+ description:
+ Owner of message-unit, is identified via Domain ID or did.
+ allOf:
+ - $ref: /schemas/types.yaml#/definitions/uint32
+ - enum: [0, 1, 2, 3, 4, 5, 6, 7]
+
+ fsl,ele_mu_id:
+ description:
+ Identifier to the message-unit among the multiple message-unit that exists on SoC.
+ It is used to create the channels, default to 2
+ allOf:
+ - $ref: /schemas/types.yaml#/definitions/uint32
+ - enum: [0, 1, 2, 3]
+
+ fsl,ele_max_users:
+ description:
+ Number of misclleneous devices to be created, default to 4
+ allOf:
+ - $ref: /schemas/types.yaml#/definitions/uint32
+ - enum: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9]
+
+ fsl,cmd_tag:
+ description:
+ Tag in message header for commands on this MU, default to 0x17
+ allOf:
+ - $ref: /schemas/types.yaml#/definitions/uint8
+ - enum: [0x17, 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e]
+
+ fsl,rsp_tag:
+ description:
+ Tag in message header for responses on this MU, default to 0xe1
+ allOf:
+ - $ref: /schemas/types.yaml#/definitions/uint8
+ - enum: [0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7, 0xe8]
+
+required:
+ - compatible
+ - mboxes
+ - mbox-names
+
+additionalProperties: false
+
+examples:
+ - |
+ ele_mu: ele_mu {
+ compatible = "fsl,imx93-ele";
+ mbox-names = "tx", "rx";
+ mboxes = <&s4muap 2 0
+ &s4muap 3 0>;
+ fsl,ele_mu_id = <1>;
+ fsl,ele_max_users = <4>;
+ fsl,cmd_tag = /bits/ 8 <0x17>;
+ fsl,rsp_tag = /bits/ 8 <0xe1>;
+ };
--
2.34.1
next prev parent reply other threads:[~2023-06-16 12:43 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-16 18:11 [PATCH v3 0/7] firmware: imx: NXP Edgelock Enclave MUAP Driver Pankaj Gupta
2023-06-16 18:11 ` Pankaj Gupta [this message]
2023-06-16 13:21 ` [PATCH v3 1/7] dt-bindings: arm: fsl: add mu binding doc Krzysztof Kozlowski
2023-07-10 17:52 ` [EXT] " Pankaj Gupta
2023-07-12 18:42 ` Krzysztof Kozlowski
2023-07-24 6:37 ` Pankaj Gupta
2023-07-24 7:17 ` Krzysztof Kozlowski
2023-07-12 18:41 ` Krzysztof Kozlowski
2023-07-24 6:37 ` [EXT] " Pankaj Gupta
2023-06-16 18:11 ` [PATCH v3 2/7] arm64: dts: imx93-11x11-evk: added ele-mu Pankaj Gupta
2023-06-16 13:21 ` Krzysztof Kozlowski
2023-07-10 17:47 ` [EXT] " Pankaj Gupta
2023-06-16 18:11 ` [PATCH v3 3/7] arm64: dts: imx93-11x11-evk: reserved mem-ranges to constrain ele-mu dma-range Pankaj Gupta
2023-06-16 18:11 ` [PATCH v3 4/7] arm64: dts: imx8ulp-evk: added ele-mu Pankaj Gupta
2023-06-16 18:11 ` [PATCH v3 5/7] arm64: dts: imx8ulp-evk: reserved mem-ranges to constrain ele-mu dma-range Pankaj Gupta
2023-06-16 18:11 ` [PATCH v3 6/7] firmware: imx: add ELE MU driver support Pankaj Gupta
2023-06-16 18:11 ` [PATCH v3 7/7] MAINTAINERS: Added maintainer details Pankaj Gupta
2023-07-10 17:40 ` Pankaj Gupta
2023-07-10 19:36 ` Randy Dunlap
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