From: Sean Nyekjaer <sean@geanix.com>
To: Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Sean Nyekjaer <sean@geanix.com>,
dantuguf14105@gmail.com,
Olivier Moysan <olivier.moysan@foss.st.com>,
devicetree@vger.kernel.org,
linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: [PATCH 2/5] ARM: dts: stm32: Add alternate pinmux for ldtc pins
Date: Tue, 20 Jun 2023 13:41:35 +0200 [thread overview]
Message-ID: <20230620114138.959812-2-sean@geanix.com> (raw)
In-Reply-To: <20230620114138.959812-1-sean@geanix.com>
Add another mux option for ltdc pins, this is used on Octavo OSD32MP1-RED
board.
Signed-off-by: Sean Nyekjaer <sean@geanix.com>
Reviewed-by: Olivier Moysan <olivier.moysan@foss.st.com>
---
arch/arm/boot/dts/stm32mp15-pinctrl.dtsi | 75 ++++++++++++++++++++++++
1 file changed, 75 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
index d79f89f37bc7..422db6dd466c 100644
--- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
@@ -979,6 +979,81 @@ pins {
};
};
+ ltdc_pins_e: ltdc-4 {
+ pins1 {
+ pinmux = <STM32_PINMUX('H', 2, AF14)>, /* LTDC_R0 */
+ <STM32_PINMUX('H', 3, AF14)>, /* LTDC_R1 */
+ <STM32_PINMUX('H', 8, AF14)>, /* LTDC_R2 */
+ <STM32_PINMUX('H', 9, AF14)>, /* LTDC_R3 */
+ <STM32_PINMUX('H', 10, AF14)>, /* LTDC_R4 */
+ <STM32_PINMUX('C', 0, AF14)>, /* LTDC_R5 */
+ <STM32_PINMUX('H', 12, AF14)>, /* LTDC_R6 */
+ <STM32_PINMUX('E', 15, AF14)>, /* LTDC_R7 */
+ <STM32_PINMUX('E', 14, AF13)>, /* LTDC_G0 */
+ <STM32_PINMUX('E', 6, AF14)>, /* LTDC_G1 */
+ <STM32_PINMUX('H', 13, AF14)>, /* LTDC_G2 */
+ <STM32_PINMUX('H', 14, AF14)>, /* LTDC_G3 */
+ <STM32_PINMUX('H', 4, AF14)>, /* LTDC_G4 */
+ <STM32_PINMUX('I', 0, AF14)>, /* LTDC_G5 */
+ <STM32_PINMUX('I', 1, AF14)>, /* LTDC_G6 */
+ <STM32_PINMUX('I', 2, AF14)>, /* LTDC_G7 */
+ <STM32_PINMUX('D', 9, AF14)>, /* LTDC_B0 */
+ <STM32_PINMUX('G', 12, AF14)>, /* LTDC_B1 */
+ <STM32_PINMUX('G', 10, AF14)>, /* LTDC_B2 */
+ <STM32_PINMUX('D', 10, AF14)>, /* LTDC_B3 */
+ <STM32_PINMUX('E', 12, AF14)>, /* LTDC_B4 */
+ <STM32_PINMUX('A', 3, AF14)>, /* LTDC_B5 */
+ <STM32_PINMUX('B', 8, AF14)>, /* LTDC_B6 */
+ <STM32_PINMUX('D', 8, AF14)>, /* LTDC_B7 */
+ <STM32_PINMUX('F', 10, AF14)>, /* LTDC_DE */
+ <STM32_PINMUX('I', 9, AF14)>, /* LTDC_VSYNC */
+ <STM32_PINMUX('I', 10, AF14)>; /* LTDC_HSYNC */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <0>;
+ };
+
+ pins2 {
+ pinmux = <STM32_PINMUX('G', 7, AF14)>; /* LTDC_CLK */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <1>;
+ };
+ };
+
+ ltdc_sleep_pins_e: ltdc-sleep-4 {
+ pins {
+ pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* LTDC_R0 */
+ <STM32_PINMUX('H', 3, ANALOG)>, /* LTDC_R1 */
+ <STM32_PINMUX('H', 8, ANALOG)>, /* LTDC_R2 */
+ <STM32_PINMUX('H', 9, ANALOG)>, /* LTDC_R3 */
+ <STM32_PINMUX('H', 10, ANALOG)>, /* LTDC_R4 */
+ <STM32_PINMUX('C', 0, ANALOG)>, /* LTDC_R5 */
+ <STM32_PINMUX('H', 12, ANALOG)>, /* LTDC_R6 */
+ <STM32_PINMUX('E', 15, ANALOG)>, /* LTDC_R7 */
+ <STM32_PINMUX('D', 9, ANALOG)>, /* LTDC_B0 */
+ <STM32_PINMUX('G', 12, ANALOG)>, /* LTDC_B1 */
+ <STM32_PINMUX('G', 10, ANALOG)>, /* LTDC_B2 */
+ <STM32_PINMUX('D', 10, ANALOG)>, /* LTDC_B3 */
+ <STM32_PINMUX('E', 12, ANALOG)>, /* LTDC_B4 */
+ <STM32_PINMUX('A', 3, ANALOG)>, /* LTDC_B5 */
+ <STM32_PINMUX('B', 8, ANALOG)>, /* LTDC_B6 */
+ <STM32_PINMUX('D', 8, ANALOG)>, /* LTDC_B7 */
+ <STM32_PINMUX('E', 14, ANALOG)>, /* LTDC_G0 */
+ <STM32_PINMUX('E', 6, ANALOG)>, /* LTDC_G1 */
+ <STM32_PINMUX('H', 13, ANALOG)>, /* LTDC_G2 */
+ <STM32_PINMUX('H', 14, ANALOG)>, /* LTDC_G3 */
+ <STM32_PINMUX('H', 4, ANALOG)>, /* LTDC_G4 */
+ <STM32_PINMUX('I', 0, ANALOG)>, /* LTDC_G5 */
+ <STM32_PINMUX('I', 1, ANALOG)>, /* LTDC_G6 */
+ <STM32_PINMUX('I', 2, ANALOG)>, /* LTDC_G7 */
+ <STM32_PINMUX('F', 10, ANALOG)>, /* LTDC_DE */
+ <STM32_PINMUX('I', 9, ANALOG)>, /* LTDC_VSYNC */
+ <STM32_PINMUX('I', 10, ANALOG)>, /* LTDC_HSYNC */
+ <STM32_PINMUX('G', 7, ANALOG)>; /* LTDC_CLK */
+ };
+ };
+
mco1_pins_a: mco1-0 {
pins {
pinmux = <STM32_PINMUX('A', 13, AF2)>; /* MCO1 */
--
2.40.0
next prev parent reply other threads:[~2023-06-20 11:42 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-20 11:41 [PATCH 1/5] ARM: dts: stm32: Add alternate pinmux for i2s pins Sean Nyekjaer
2023-06-20 11:41 ` Sean Nyekjaer [this message]
2023-06-20 11:41 ` [PATCH 3/5] ARM: dts: stm32: Add alternate pinmux for can pins Sean Nyekjaer
2023-06-20 11:41 ` [PATCH 4/5] ARM: dts: stm32: Add Octavo STM32MP15x SiP Sean Nyekjaer
2023-06-20 13:48 ` Sean Nyekjaer
2023-06-20 11:41 ` [PATCH 5/5] ARM: dts: stm32: Add Octavo OSD32MP1-RED board Sean Nyekjaer
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