From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6B657EB64DD for ; Tue, 27 Jun 2023 14:40:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230523AbjF0OkP (ORCPT ); Tue, 27 Jun 2023 10:40:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40782 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231819AbjF0Oj7 (ORCPT ); Tue, 27 Jun 2023 10:39:59 -0400 Received: from mail-pf1-x435.google.com (mail-pf1-x435.google.com [IPv6:2607:f8b0:4864:20::435]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 540D535A9 for ; Tue, 27 Jun 2023 07:39:23 -0700 (PDT) Received: by mail-pf1-x435.google.com with SMTP id d2e1a72fcca58-668704a5b5bso4218744b3a.0 for ; Tue, 27 Jun 2023 07:39:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1687876760; x=1690468760; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date:from:to :cc:subject:date:message-id:reply-to; bh=4nJWDV0jywhxf0OMEHmO3nQx+Dc6iDsFe4yCSR+nmZo=; b=kdgHbqxy6l7gE3SPWR0nWqtUAV597wHSuY6o8Fl9p27nal0aM6gMTEz7xLENW+Jws1 hlOTruXn7Hs+MgPpcR/2juT+bELpD8YS1/5TYD/dLrGMaxIXqiAVmRvDrhs1xlHx2gCZ 3trw24snpKKKFkqDv3nqUZvIlDAwhJKH7s5PaNzGxfmYwx/YvwjUHMearGW6Al66I0Fs DHUyBty4p/VQVOaVpsMCyxEQvcaYpZk8ySM3DKXyDfV2UKjXmUesPxAY9/anaWKYu264 VqJWhFlMhXMdu9SaoisStiOEt0WEI+99CfhgAKs+fl16xhhX3bbp+O8UPpT9B6jN0NC0 kd6Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1687876760; x=1690468760; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=4nJWDV0jywhxf0OMEHmO3nQx+Dc6iDsFe4yCSR+nmZo=; b=FO07syfxyDGGsVI1XysxEubpzzbI6Vz9JP5lOJeUS5DnaC4g9zBjd5i0tKirvu8Rkm gTmeuqjnKXnePgtsQVliWooL2D+q5PpFSd6Ia5ph18AntDUmvS2MELIFWWC9R4yQtqYs uyQkNmEr+PcwrfCNu/Mw73vyilHEmHQcns237uMjYZEeQlRfKIPwhj2NGDKhKbUj517H 6IzYr2nEZsvIPKKq2VNhyWoCIw7xU2Cv5V2CxJO5zAiWw647dz/1E80g82tBf6mhtm1R grL+zK8QU3787+KIvGywHVZstz8XfK3+8iEIBNZ9+aGfW28URswzEjKK1IJDBMNWPFx4 sxdA== X-Gm-Message-State: AC+VfDzIbG7ni1z1YBZYar2cmQQY67qiuG7ksUraSkQdCWhlJTfQuSDQ qtEkB8Bziu1T4+41Dv11MsaI X-Google-Smtp-Source: ACHHUZ5q4MSqBMad/7CU3n0bTQr5IyeSnkozHYAD/trBnbhPd2KNQd92dY2h/ORvdIT1OeC1SxnDzw== X-Received: by 2002:a05:6a20:549a:b0:123:2c2a:ee62 with SMTP id i26-20020a056a20549a00b001232c2aee62mr22355330pzk.14.1687876760443; Tue, 27 Jun 2023 07:39:20 -0700 (PDT) Received: from thinkpad ([117.217.176.90]) by smtp.gmail.com with ESMTPSA id o6-20020a63e346000000b00553b9e0510esm5820482pgj.60.2023.06.27.07.39.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Jun 2023 07:39:20 -0700 (PDT) Date: Tue, 27 Jun 2023 20:09:12 +0530 From: Manivannan Sadhasivam To: Krishna chaitanya chundru Cc: helgaas@kernel.org, linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, quic_vbadigan@quicinc.com, quic_nitegupt@quicinc.com, quic_skananth@quicinc.com, quic_ramkri@quicinc.com, krzysztof.kozlowski@linaro.org, Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" Subject: Re: [PATCH v5 2/3] arm: dts: qcom: sdx65: Add interconnect path Message-ID: <20230627143912.GG5490@thinkpad> References: <1687827692-6181-1-git-send-email-quic_krichai@quicinc.com> <1687827692-6181-3-git-send-email-quic_krichai@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <1687827692-6181-3-git-send-email-quic_krichai@quicinc.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Tue, Jun 27, 2023 at 06:31:30AM +0530, Krishna chaitanya chundru wrote: > Add pcie-mem interconnect path to sdx65 target. > "target" is meaningless in upstream. Call it "SoC or platform". Also the subject should mention PCIe interconnect. > Signed-off-by: Krishna chaitanya chundru With both changes above, Reviewed-by: Manivannan Sadhasivam - Mani > --- > arch/arm/boot/dts/qcom/qcom-sdx65.dtsi | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi > index 1a35830..77fa97c 100644 > --- a/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi > +++ b/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi > @@ -332,6 +332,9 @@ > ; > interrupt-names = "global", "doorbell"; > > + interconnects = <&system_noc MASTER_PCIE_0 &mc_virt SLAVE_EBI1>; > + interconnect-names = "pcie-mem"; > + > resets = <&gcc GCC_PCIE_BCR>; > reset-names = "core"; > > -- > 2.7.4 > -- மணிவண்ணன் சதாசிவம்