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From: Konrad Dybcio <konrad.dybcio@linaro.org>
To: Rob Clark <robdclark@gmail.com>,
	Abhinav Kumar <quic_abhinavk@quicinc.com>,
	Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
	Sean Paul <sean@poorly.run>, David Airlie <airlied@gmail.com>,
	Daniel Vetter <daniel@ffwll.ch>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Bjorn Andersson <andersson@kernel.org>
Cc: Marijn Suijten <marijn.suijten@somainline.org>,
	linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
	freedreno@lists.freedesktop.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	Konrad Dybcio <konrad.dybcio@linaro.org>,
	Neil Armstrong <neil.armstrong@linaro.org>
Subject: [PATCH v3 10/10] drm/msm/a6xx: Poll for GBIF unhalt status in hw_init
Date: Wed, 23 Aug 2023 14:56:03 +0200	[thread overview]
Message-ID: <20230628-topic-a7xx_drmmsm-v3-10-4ee67ccbaf9d@linaro.org> (raw)
In-Reply-To: <20230628-topic-a7xx_drmmsm-v3-0-4ee67ccbaf9d@linaro.org>

Some GPUs - particularly A7xx ones - are really really stubborn and
sometimes take a longer-than-expected time to finish unhalting GBIF.

Note that this is not caused by the request a few lines above.

Poll for the unhalt ack to make sure we're not trying to write bits to
an essentially dead GPU that can't receive data on its end of the bus.
Failing to do this will result in inexplicable GMU timeouts or worse.

This is a rather ugly hack which introduces a whole lot of latency.

Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> # sm8450
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
 drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
index 2313620084b6..11cb410e0ac7 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
@@ -1629,6 +1629,10 @@ static int hw_init(struct msm_gpu *gpu)
 		mb();
 	}
 
+	/* Some GPUs are stubborn and take their sweet time to unhalt GBIF! */
+	if (adreno_is_a7xx(adreno_gpu) && a6xx_has_gbif(adreno_gpu))
+		spin_until(!gpu_read(gpu, REG_A6XX_GBIF_HALT_ACK));
+
 	gpu_write(gpu, REG_A6XX_RBBM_SECVID_TSB_CNTL, 0);
 
 	if (adreno_is_a619_holi(adreno_gpu))

-- 
2.42.0


      parent reply	other threads:[~2023-08-23 12:56 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-23 12:55 [PATCH v3 00/10] A7xx support Konrad Dybcio
2023-08-23 12:55 ` [PATCH v3 01/10] dt-bindings: display/msm/gmu: Add Adreno 7[34]0 GMU Konrad Dybcio
2023-08-23 12:55 ` [PATCH v3 02/10] dt-bindings: display/msm/gmu: Allow passing QMP handle Konrad Dybcio
2023-08-23 12:55 ` [PATCH v3 03/10] dt-bindings: display/msm/gpu: Allow A7xx SKUs Konrad Dybcio
2023-08-23 12:55 ` [PATCH v3 04/10] drm/msm/a6xx: Add missing regs for A7XX Konrad Dybcio
2023-08-23 12:55 ` [PATCH v3 05/10] drm/msm/a6xx: Add skeleton A7xx support Konrad Dybcio
2023-09-11 15:30   ` Dmitry Baryshkov
2023-08-23 12:55 ` [PATCH v3 06/10] drm/msm/a6xx: Send ACD state to QMP at GMU resume Konrad Dybcio
2023-08-23 12:56 ` [PATCH v3 07/10] drm/msm/a6xx: Mostly implement A7xx gpu_state Konrad Dybcio
2023-08-23 12:56 ` [PATCH v3 08/10] drm/msm/a6xx: Add A730 support Konrad Dybcio
2023-08-23 12:56 ` [PATCH v3 09/10] drm/msm/a6xx: Add A740 support Konrad Dybcio
2023-09-12 12:52   ` Konrad Dybcio
2023-08-23 12:56 ` Konrad Dybcio [this message]

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