From: Andrew Jones <ajones@ventanamicro.com>
To: Conor Dooley <conor@kernel.org>
Cc: Palmer Dabbelt <palmer@rivosinc.com>,
Conor Dooley <conor.dooley@microchip.com>,
robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
Paul Walmsley <paul.walmsley@sifive.com>,
aou@eecs.berkeley.edu, heiko.stuebner@vrull.eu,
Evan Green <evan@rivosinc.com>,
sunilvl@ventanamicro.com, linux-riscv@lists.infradead.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 10/10] RISC-V: provide a Kconfig option to disable parsing "riscv,isa"
Date: Fri, 30 Jun 2023 09:46:48 +0200 [thread overview]
Message-ID: <20230630-7d0f6fe66c9415315d491f15@orel> (raw)
In-Reply-To: <20230629-angled-gallantly-8fe7451a25fa@spud>
On Thu, Jun 29, 2023 at 10:44:18PM +0100, Conor Dooley wrote:
> On Thu, Jun 29, 2023 at 02:16:49PM -0700, Palmer Dabbelt wrote:
> > On Thu, 29 Jun 2023 13:20:55 PDT (-0700), Conor Dooley wrote:
...
> > > +bool __initdata riscv_isa_fallback_cmdline = false;
> > > +static int __init riscv_isa_fallback_setup(char *__unused)
> >
> > Maybe it's better to support =true and =false here? Not sure it matters,
> > we're already down a rabbit hole ;)
>
> Dunno, not implemented a cmdline param before. Seemed "cleaner" to check
> for presence, don't really care so I'll adapt to w/e.
>
I don't have a strong preference here, but to throw in more food for
thought, I see this DT-v1 vs. DT-v2 choice to be a bit analogous to the
DT vs. ACPI choice. The 'acpi' command line parameter, for RISC-V, can
be 'off', 'on', and 'force', where
off -- disable ACPI if default was on
on -- enable ACPI but allow fallback to DT
force -- enable ACPI if default was off
So, if the default of the isa fallback command line option will depend on
Kconfig, then we may also want a 'force'.
Thanks,
drew
next prev parent reply other threads:[~2023-06-30 7:48 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-29 8:28 [PATCH v2 00/10] RISC-V: Probe DT extension support using riscv,isa-extensions & riscv,isa-base Conor Dooley
2023-06-29 8:28 ` [PATCH v2 01/10] RISC-V: don't parse dt/acpi isa string to get rv32/rv64 Conor Dooley
2023-06-29 23:10 ` Evan Green
2023-06-29 23:13 ` Conor Dooley
2023-06-29 8:28 ` [PATCH v2 02/10] RISC-V: drop a needless check in print_isa_ext() Conor Dooley
2023-06-29 8:28 ` [PATCH v2 03/10] RISC-V: shunt isa_ext_arr to cpufeature.c Conor Dooley
2023-06-29 23:11 ` Evan Green
2023-06-30 7:28 ` Andrew Jones
2023-06-29 8:28 ` [PATCH v2 04/10] RISC-V: repurpose riscv_isa_ext array in riscv_fill_hwcap() Conor Dooley
2023-06-29 8:28 ` [PATCH v2 05/10] RISC-V: add missing single letter extension definitions Conor Dooley
2023-06-29 8:28 ` [PATCH v2 06/10] RISC-V: add single letter extensions to riscv_isa_ext Conor Dooley
2023-06-29 23:11 ` Evan Green
2023-06-29 8:28 ` [PATCH v2 07/10] RISC-V: split riscv_fill_hwcap() in 3 Conor Dooley
2023-06-29 8:28 ` [PATCH v2 08/10] RISC-V: enable extension detection from new properties Conor Dooley
2023-06-29 8:28 ` [PATCH v2 09/10] RISC-V: try new extension properties in of_early_processor_hartid() Conor Dooley
2023-06-29 8:28 ` [PATCH v2 10/10] RISC-V: provide a Kconfig option to disable parsing "riscv,isa" Conor Dooley
2023-06-29 9:31 ` Andrew Jones
2023-06-29 11:39 ` Conor Dooley
2023-06-29 13:53 ` Andrew Jones
2023-06-29 20:20 ` Conor Dooley
2023-06-29 21:16 ` Palmer Dabbelt
2023-06-29 21:44 ` Conor Dooley
2023-06-29 22:47 ` Palmer Dabbelt
2023-06-30 7:46 ` Andrew Jones [this message]
2023-06-30 13:19 ` Conor Dooley
2023-07-01 10:49 ` Andrew Jones
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