From: Andrew Jones <ajones@ventanamicro.com>
To: Conor Dooley <conor@kernel.org>
Cc: palmer@dabbelt.com, Conor Dooley <conor.dooley@microchip.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Alistair Francis <alistair.francis@wdc.com>,
Anup Patel <apatel@ventanamicro.com>,
Atish Patra <atishp@atishpatra.org>,
Jessica Clarke <jrtc27@jrtc27.com>,
Rick Chen <rick@andestech.com>, Leo <ycliang@andestech.com>,
Oleksii <oleksii.kurochko@gmail.com>,
linux-riscv@lists.infradead.org, qemu-riscv@nongnu.org,
u-boot@lists.denx.de, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
Palmer Dabbelt <palmer@rivosinc.com>,
Rob Herring <robh@kernel.org>
Subject: Re: [PATCH v4] dt-bindings: riscv: deprecate riscv,isa
Date: Sat, 1 Jul 2023 13:01:40 +0200 [thread overview]
Message-ID: <20230701-b348653e432924f090c513db@orel> (raw)
In-Reply-To: <20230630-very-greedless-16522d7b7830@spud>
On Fri, Jun 30, 2023 at 07:04:04PM +0100, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
...
> +oneOf:
> + - required:
> + - riscv,isa
> + - required:
> + - riscv,isa-base
> +
I guess this means a DT must have either isa or isa-base, but not both.
What should QEMU and other platforms which want to provide DTs that work
for older kernels, but also start using the new schema do? I'd guess
they'd like to provide both, where they'd expect isa-base to be used by
newer kernels and isa by the old.
Thanks,
drew
next prev parent reply other threads:[~2023-07-01 11:01 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-30 18:04 [PATCH v4] dt-bindings: riscv: deprecate riscv,isa Conor Dooley
2023-06-30 20:40 ` Palmer Dabbelt
2023-07-01 11:01 ` Andrew Jones [this message]
2023-07-01 11:25 ` Conor Dooley
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