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[2001:1ae9:1c2:4c00:20f:c6b4:1e57:7965]) by smtp.gmail.com with ESMTPSA id m21-20020a7bcb95000000b003faabd8fcb8sm20512776wmi.46.2023.07.03.03.36.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Jul 2023 03:36:45 -0700 (PDT) Date: Mon, 3 Jul 2023 12:36:44 +0200 From: Andrew Jones To: Conor Dooley Cc: palmer@dabbelt.com, conor@kernel.org, Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Albert Ou , Jonathan Corbet , Heiko Stuebner , Evan Green , Sunil V L , linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Palmer Dabbelt Subject: Re: [PATCH v3 01/11] RISC-V: Provide a more helpful error message on invalid ISA strings Message-ID: <20230703-8b9d59a770926dbfa5771966@orel> References: <20230703-repayment-vocalist-e4f3eeac2b2a@wendy> <20230703-girdle-underling-880f633c4c73@wendy> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230703-girdle-underling-880f633c4c73@wendy> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Mon, Jul 03, 2023 at 11:27:53AM +0100, Conor Dooley wrote: > From: Palmer Dabbelt > > Right now we provide a somewhat unhelpful error message on systems with > invalid error messages, something along the lines of > > CPU with hartid=0 is not available > ------------[ cut here ]------------ > kernel BUG at arch/riscv/kernel/smpboot.c:174! > Kernel BUG [#1] > Modules linked in: > CPU: 0 PID: 0 Comm: swapper Not tainted 6.4.0-rc1-00096-ge0097d2c62d5-dirty #1 > Hardware name: Microchip PolarFire-SoC Icicle Kit (DT) > epc : of_parse_and_init_cpus+0x16c/0x16e > ra : of_parse_and_init_cpus+0x9a/0x16e > epc : ffffffff80c04e0a ra : ffffffff80c04d38 sp : ffffffff81603e20 > gp : ffffffff8182d658 tp : ffffffff81613f80 t0 : 000000000000006e > t1 : 0000000000000064 t2 : 0000000000000000 s0 : ffffffff81603e80 > s1 : 0000000000000000 a0 : 0000000000000000 a1 : 0000000000000000 > a2 : 0000000000000000 a3 : 0000000000000000 a4 : 0000000000000000 > a5 : 0000000000001fff a6 : 0000000000001fff a7 : ffffffff816148b0 > s2 : 0000000000000001 s3 : ffffffff81492a4c s4 : ffffffff81a4b090 > s5 : ffffffff81506030 s6 : 0000000000000040 s7 : 0000000000000000 > s8 : 00000000bfb6f046 s9 : 0000000000000001 s10: 0000000000000000 > s11: 00000000bf389700 t3 : 0000000000000000 t4 : 0000000000000000 > t5 : ffffffff824dd188 t6 : ffffffff824dd187 > status: 0000000200000100 badaddr: 0000000000000000 cause: 0000000000000003 > [] of_parse_and_init_cpus+0x16c/0x16e > [] setup_smp+0x1e/0x26 > [] setup_arch+0x6e/0xb2 > [] start_kernel+0x72/0x400 > Code: 80e7 4a00 a603 0009 b795 1097 ffe5 80e7 92c0 9002 (9002) 715d > ---[ end trace 0000000000000000 ]--- > Kernel panic - not syncing: Fatal exception in interrupt > > Add a warning for the cases where the ISA string isn't valid. It's still > above the BUG_ON cut, but hopefully it's at least a bit easier for users. > > Signed-off-by: Palmer Dabbelt > Signed-off-by: Conor Dooley > --- > arch/riscv/kernel/cpu.c | 8 ++++++-- > 1 file changed, 6 insertions(+), 2 deletions(-) > > diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c > index a2fc952318e9..3af2d214ce21 100644 > --- a/arch/riscv/kernel/cpu.c > +++ b/arch/riscv/kernel/cpu.c > @@ -66,11 +66,15 @@ int riscv_early_of_processor_hartid(struct device_node *node, unsigned long *har > return -ENODEV; > } > > - if (IS_ENABLED(CONFIG_32BIT) && strncasecmp(isa, "rv32ima", 7)) > + if (IS_ENABLED(CONFIG_32BIT) && strncasecmp(isa, "rv32ima", 7)) { > + pr_warn("CPU with hartid=%lu does not support rv32ima", *hart); > return -ENODEV; > + } > > - if (IS_ENABLED(CONFIG_64BIT) && strncasecmp(isa, "rv64ima", 7)) > + if (IS_ENABLED(CONFIG_64BIT) && strncasecmp(isa, "rv64ima", 7)) { > + pr_warn("CPU with hartid=%lu does not support rv64ima", *hart); > return -ENODEV; > + } > > return 0; > } > -- > 2.40.1 > Reviewed-by: Andrew Jones