From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A72F8EB64D9 for ; Tue, 4 Jul 2023 09:20:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231921AbjGDJUA convert rfc822-to-8bit (ORCPT ); Tue, 4 Jul 2023 05:20:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44138 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231896AbjGDJT6 (ORCPT ); Tue, 4 Jul 2023 05:19:58 -0400 Received: from ex01.ufhost.com (ex01.ufhost.com [61.152.239.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1B62D127; Tue, 4 Jul 2023 02:19:55 -0700 (PDT) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id C4B3424E2B5; Tue, 4 Jul 2023 17:19:52 +0800 (CST) Received: from EXMBX068.cuchost.com (172.16.6.68) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Tue, 4 Jul 2023 17:19:52 +0800 Received: from williamqiu-virtual-machine.starfivetech.com (171.223.208.138) by EXMBX068.cuchost.com (172.16.6.68) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Tue, 4 Jul 2023 17:19:51 +0800 From: William Qiu To: , , , CC: Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Emil Renner Berthing , Linus Walleij , William Qiu Subject: [PATCH v4 0/3] Add initialization of clock for StarFive JH7110 SoC Date: Tue, 4 Jul 2023 17:19:45 +0800 Message-ID: <20230704091948.85247-4-william.qiu@starfivetech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230704091948.85247-1-william.qiu@starfivetech.com> References: <20230704091948.85247-1-william.qiu@starfivetech.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [171.223.208.138] X-ClientProxiedBy: EXCAS062.cuchost.com (172.16.6.22) To EXMBX068.cuchost.com (172.16.6.68) X-YovoleRuleAgent: yovoleflag Content-Transfer-Encoding: 8BIT Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hi, This patchset adds initial rudimentary support for the StarFive Quad SPI controller driver. And this driver will be used in StarFive's VisionFive 2 board. In 6.4, the QSPI_AHB and QSPI_APB clocks changed from the default ON state to the default OFF state, so these clocks need to be enabled in the driver.At the same time, dts patch is added to this series. Changes v3->v4: - Added minItems for clocks. - Added clock names property. - Fixed formatting issues. Changes v2->v3: - Rebaed to v6.4rc6. - Renamed the clock names. - Changed the variable definition type. Changes v1->v2: - Renamed the clock names. - Specified a different array of clocks. - Used clk_bulk_ APIs. The patch series is based on v6.4rc6. William Qiu (3): dt-bindings: qspi: cdns,qspi-nor: Add clocks for StarFive JH7110 SoC spi: cadence-quadspi: Add clock configuration for StarFive JH7110 QSPI riscv: dts: starfive: Add QSPI controller node for StarFive JH7110 SoC .../bindings/spi/cdns,qspi-nor.yaml | 12 ++++++- .../jh7110-starfive-visionfive-2.dtsi | 32 +++++++++++++++++++ arch/riscv/boot/dts/starfive/jh7110.dtsi | 18 +++++++++++ drivers/spi/spi-cadence-quadspi.c | 20 ++++++++++++ 4 files changed, 81 insertions(+), 1 deletion(-) -- 2.34.1