[PATCH] pwm: mtk_disp: fix disp_pwm coverity issue

[Shuijing Li <shuijing.li@mediatek.com>]

There is a coverity issue in the original mtk_disp_pwm_get_state()
function. In function call DIV64_U64_ROUND_UP, division by expression
Which may be zero has undefined behavior.
Fix this accordingly.

Signed-off-by: Shuijing Li <shuijing.li@mediatek.com>
---
 drivers/pwm/pwm-mtk-disp.c | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/pwm/pwm-mtk-disp.c b/drivers/pwm/pwm-mtk-disp.c
index 79e321e96f56..ca00058a6ef4 100644
--- a/drivers/pwm/pwm-mtk-disp.c
+++ b/drivers/pwm/pwm-mtk-disp.c
@@ -196,6 +196,14 @@ static int mtk_disp_pwm_get_state(struct pwm_chip *chip,
 		return err;
 	}
 
+	rate = clk_get_rate(mdp->clk_main);
+	if (rate <= 0) {
+		dev_err(chip->dev, "Can't get rate: %pe\n", ERR_PTR(rate));
+		clk_disable_unprepare(mdp->clk_mm);
+		clk_disable_unprepare(mdp->clk_main);
+		return err;
+	}
+
 	/*
 	 * Apply DISP_PWM_DEBUG settings to choose whether to enable or disable
 	 * registers double buffer and manual commit to working register before
@@ -206,7 +214,6 @@ static int mtk_disp_pwm_get_state(struct pwm_chip *chip,
 					 mdp->data->bls_debug_mask,
 					 mdp->data->bls_debug_mask);
 
-	rate = clk_get_rate(mdp->clk_main);
 	con0 = readl(mdp->base + mdp->data->con0);
 	con1 = readl(mdp->base + mdp->data->con1);
 	pwm_en = readl(mdp->base + DISP_PWM_EN);
-- 
2.40.1