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Date:   Sat, 8 Jul 2023 16:25:41 +0100
From:   Jonathan Cameron <jic23@kernel.org>
To:     Jishnu Prakash <quic_jprakash@quicinc.com>
Cc:     <agross@kernel.org>, <devicetree@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>, <linus.walleij@linaro.org>,
        <Jonathan.Cameron@huawei.com>, <sboyd@kernel.org>,
        <dmitry.baryshkov@linaro.org>, <quic_subbaram@quicinc.com>,
        <quic_collinsd@quicinc.com>, <quic_kamalw@quicinc.com>,
        <quic_jestar@quicinc.com>, <marijn.suijten@somainline.org>,
        <andriy.shevchenko@linux.intel.com>,
        <krzysztof.kozlowski@linaro.org>,
        Lars-Peter Clausen <lars@metafoo.de>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Conor Dooley <conor+dt@kernel.org>,
        Bjorn Andersson <andersson@kernel.org>,
        Konrad Dybcio <konrad.dybcio@linaro.org>,
        "Luca Weiss" <luca@z3ntu.xyz>, <linux-iio@vger.kernel.org>,
        <linux-arm-msm@vger.kernel.org>,
        <linux-arm-msm-owner@vger.kernel.org>
Subject: Re: [PATCH 06/11] iio: adc: Add QCOM PMIC5 Gen3 ADC bindings
Message-ID: <20230708162541.1a15ed14@jic23-huawei>
In-Reply-To: <20230708161259.7af17fa9@jic23-huawei>
References: <20230708072835.3035398-1-quic_jprakash@quicinc.com>
        <20230708072835.3035398-7-quic_jprakash@quicinc.com>
        <20230708161259.7af17fa9@jic23-huawei>
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> >  properties:
> >    compatible:
> > @@ -27,10 +27,11 @@ properties:
> >            - qcom,spmi-adc5
> >            - qcom,spmi-adc-rev2
> >            - qcom,spmi-adc5-gen2
> > +          - qcom,spmi-adc5-gen3
> >  
> >    reg:
> >      description: VADC base address in the SPMI PMIC register map
> > -    maxItems: 1
> > +    minItems: 1  
> 
> ?
Found it now.  This needs documentation that it's providing multiple
base addresses for gen3.  Also needs to only apply that to gen3...