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[2001:1ae9:1c2:4c00:20f:c6b4:1e57:7965]) by smtp.gmail.com with ESMTPSA id 24-20020a05600c22d800b003fbaade072dsm2569934wmg.23.2023.07.11.06.26.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 11 Jul 2023 06:26:13 -0700 (PDT) Date: Tue, 11 Jul 2023 15:26:12 +0200 From: Andrew Jones To: Anup Patel Cc: Palmer Dabbelt , Paul Walmsley , Thomas Gleixner , Marc Zyngier , Rob Herring , Krzysztof Kozlowski , Atish Patra , Sunil V L , Conor Dooley , Saravana Kannan , Anup Patel , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH v5 1/9] RISC-V: Add riscv_fw_parent_hartid() function Message-ID: <20230711-3151a76400deb88b218e9f9b@orel> References: <20230710094321.1378351-1-apatel@ventanamicro.com> <20230710094321.1378351-2-apatel@ventanamicro.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230710094321.1378351-2-apatel@ventanamicro.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Mon, Jul 10, 2023 at 03:13:13PM +0530, Anup Patel wrote: > We add common riscv_fw_parent_hartid() which help device drivers > to get parent hartid of the INTC (i.e. local interrupt controller) > fwnode. This should work for both DT and ACPI. > > Signed-off-by: Anup Patel > --- > arch/riscv/include/asm/processor.h | 3 +++ > arch/riscv/kernel/cpu.c | 16 ++++++++++++++++ > 2 files changed, 19 insertions(+) > > diff --git a/arch/riscv/include/asm/processor.h b/arch/riscv/include/asm/processor.h > index c950a8d9edef..39dc23a18f88 100644 > --- a/arch/riscv/include/asm/processor.h > +++ b/arch/riscv/include/asm/processor.h > @@ -81,6 +81,9 @@ int riscv_of_processor_hartid(struct device_node *node, unsigned long *hartid); > int riscv_early_of_processor_hartid(struct device_node *node, unsigned long *hartid); > int riscv_of_parent_hartid(struct device_node *node, unsigned long *hartid); > > +struct fwnode_handle; > +int riscv_fw_parent_hartid(struct fwnode_handle *node, unsigned long *hartid); > + > extern void riscv_fill_hwcap(void); > extern int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src); > > diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c > index a2fc952318e9..9be9b3b1f333 100644 > --- a/arch/riscv/kernel/cpu.c > +++ b/arch/riscv/kernel/cpu.c > @@ -96,6 +96,22 @@ int riscv_of_parent_hartid(struct device_node *node, unsigned long *hartid) > return -1; > } > > +/* Find hart ID of the CPU fwnode under which given fwnode falls. */ This comment matches the comment for riscv_of_parent_hartid(), but I don't think it will be correct for the !is_of_node(node) case since fwnode_property_read_u64_array() isn't obliged to walk up its tree. Looking ahead it appears riscv_fw_parent_hartid() is only called with the parent node, so we could just drop this function and use fwnode_property_read_u64_array() directly at the two call sites. Thanks, drew > +int riscv_fw_parent_hartid(struct fwnode_handle *node, unsigned long *hartid) > +{ > + int rc; > + u64 temp; > + > + if (!is_of_node(node)) { > + rc = fwnode_property_read_u64_array(node, "hartid", &temp, 1); > + if (!rc) > + *hartid = temp; > + } else > + rc = riscv_of_parent_hartid(to_of_node(node), hartid); > + > + return rc; > +} > + > DEFINE_PER_CPU(struct riscv_cpuinfo, riscv_cpuinfo); > > unsigned long riscv_cached_mvendorid(unsigned int cpu_id) > -- > 2.34.1 >