From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E49F5EB64DC for ; Tue, 11 Jul 2023 15:31:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231986AbjGKPby (ORCPT ); Tue, 11 Jul 2023 11:31:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47526 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232243AbjGKPbx (ORCPT ); Tue, 11 Jul 2023 11:31:53 -0400 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CC2DB98; Tue, 11 Jul 2023 08:31:51 -0700 (PDT) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 36BFVi2Z045003; Tue, 11 Jul 2023 10:31:44 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1689089504; bh=D3D3/xIRjkeyEdydyNGC69xJm+Qy4qemkwlt3tgV/OI=; h=Date:From:To:CC:Subject:References:In-Reply-To; b=kDNYjFlaCjTd1th4zNrVe7yHWM0bCL1XKtmJSVK+FdMDS4wujgpNi4CLdJrPY7+Kd KJ1bj0HBkQguTBxO23pz+0PBO/XLR7tic7+dDLd4Dh2RR1Dc4Fe78U/eIuLL/BbqcN oWDE50qb94/Om2aYd/T67KJGWu/bdRA4eMUwTD+I= Received: from DFLE105.ent.ti.com (dfle105.ent.ti.com [10.64.6.26]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 36BFVik8045541 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 11 Jul 2023 10:31:44 -0500 Received: from DFLE112.ent.ti.com (10.64.6.33) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 11 Jul 2023 10:31:44 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 11 Jul 2023 10:31:44 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 36BFViMW069720; Tue, 11 Jul 2023 10:31:44 -0500 Date: Tue, 11 Jul 2023 10:31:44 -0500 From: Nishanth Menon To: Jayesh Choudhary CC: Krzysztof Kozlowski , , , , , , , , , Subject: Re: [PATCH v5 1/5] arm64: dts: ti: k3-j784s4-main: Add system controller and SERDES lane mux Message-ID: <20230711153144.jvofubaez5uoog5p@unmanaged> References: <20230710101705.154119-1-j-choudhary@ti.com> <20230710101705.154119-2-j-choudhary@ti.com> <23833669-b9f7-94aa-ea42-56843842cba6@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 12:01-20230711, Jayesh Choudhary wrote: > > > On 10/07/23 17:13, Krzysztof Kozlowski wrote: > > On 10/07/2023 12:17, Jayesh Choudhary wrote: > > > From: Siddharth Vadapalli > > > > > > The system controller node manages the CTRL_MMR0 region. > > > Add serdes_ln_ctrl node which is used for controlling the SERDES lane mux. > > > > > > Signed-off-by: Siddharth Vadapalli > > > [j-choudhary@ti.com: Add reg property to fix dtc warning] > > > Signed-off-by: Jayesh Choudhary > > > --- > > > arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 23 ++++++++++++++++++++++ > > > 1 file changed, 23 insertions(+) > > > > > > diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi > > > index 2ea0adae6832..68cc2fa053e7 100644 > > > --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi > > > +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi > > > @@ -5,6 +5,9 @@ > > > * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ > > > */ > > > +#include > > > +#include > > > > Why? What do you use from that binding? > > > > Missed idle-state in the mux-controller node here for default values. > I will wait for more feedback and then re-spin the series. btw, I am wondering if ti-serdes.h should even exist in dt-bindings - are any of the macros used in the driver? or should this follow the pinctrl style macros that could happily reside in arch/arm64/boot/dts/ti ? -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D